DOSBox-X
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Defines
src/cpu/core_normal_286.cpp
00001 /*
00002  *  Copyright (C) 2002-2019  The DOSBox Team
00003  *
00004  *  This program is free software; you can redistribute it and/or modify
00005  *  it under the terms of the GNU General Public License as published by
00006  *  the Free Software Foundation; either version 2 of the License, or
00007  *  (at your option) any later version.
00008  *
00009  *  This program is distributed in the hope that it will be useful,
00010  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
00011  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012  *  GNU General Public License for more details.
00013  *
00014  *  You should have received a copy of the GNU General Public License
00015  *  along with this program; if not, write to the Free Software
00016  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA.
00017  */
00018 
00019 #include <stdio.h>
00020 #include <stdlib.h>
00021 
00022 #include "dosbox.h"
00023 #include "mem.h"
00024 #include "cpu.h"
00025 #include "lazyflags.h"
00026 #include "inout.h"
00027 #include "callback.h"
00028 #include "pic.h"
00029 #include "fpu.h"
00030 #include "paging.h"
00031 #include "mmx.h"
00032 
00033 bool CPU_RDMSR();
00034 bool CPU_WRMSR();
00035 
00036 #define CPU_CORE CPU_ARCHTYPE_286
00037 #define CPU_Core_Normal_Trap_Run CPU_Core286_Normal_Trap_Run
00038 
00039 #define DoString DoString_Normal286
00040 
00041 extern bool ignore_opcode_63;
00042 
00043 #if C_DEBUG
00044 #include "debug.h"
00045 #endif
00046 
00047 #if (!C_CORE_INLINE)
00048 #define LoadMb(off) mem_readb(off)
00049 #define LoadMw(off) mem_readw(off)
00050 #define LoadMd(off) mem_readd(off)
00051 #define LoadMq(off) ((Bit64u)((Bit64u)mem_readd(off+4)<<32 | (Bit64u)mem_readd(off)))
00052 #define SaveMb(off,val) mem_writeb(off,val)
00053 #define SaveMw(off,val) mem_writew(off,val)
00054 #define SaveMd(off,val) mem_writed(off,val)
00055 #define SaveMq(off,val) {mem_writed(off,val&0xffffffff);mem_writed(off+4,(val>>32)&0xffffffff);}
00056 #else 
00057 #include "paging.h"
00058 #define LoadMb(off) mem_readb_inline(off)
00059 #define LoadMw(off) mem_readw_inline(off)
00060 #define LoadMd(off) mem_readd_inline(off)
00061 #define LoadMq(off) ((Bit64u)((Bit64u)mem_readd_inline(off+4)<<32 | (Bit64u)mem_readd_inline(off)))
00062 #define SaveMb(off,val) mem_writeb_inline(off,val)
00063 #define SaveMw(off,val) mem_writew_inline(off,val)
00064 #define SaveMd(off,val) mem_writed_inline(off,val)
00065 #define SaveMq(off,val) {mem_writed_inline(off,val&0xffffffff);mem_writed_inline(off+4,(val>>32)&0xffffffff);}
00066 #endif
00067 
00068 extern Bitu cycle_count;
00069 
00070 #if C_FPU
00071 #define CPU_FPU 1u                                              //Enable FPU escape instructions
00072 #endif
00073 
00074 #define CPU_PIC_CHECK 1u
00075 #define CPU_TRAP_CHECK 1u
00076 
00077 #define OPCODE_NONE                     0x000u
00078 #define OPCODE_0F                       0x100u
00079 
00080 #define OPCODE_SIZE                     0u                      //DISABLED
00081 
00082 #define PREFIX_ADDR                     0u                      //DISABLED
00083 
00084 #define PREFIX_REP                      0x2u
00085 
00086 #define TEST_PREFIX_ADDR        (0u)                            //DISABLED
00087 #define TEST_PREFIX_REP         (core.prefixes & PREFIX_REP)
00088 
00089 #define DO_PREFIX_SEG(_SEG)                                     \
00090     if (GETFLAG(IF) && CPU_Cycles <= 0) goto prefix_out; \
00091         BaseDS=SegBase(_SEG);                                   \
00092         BaseSS=SegBase(_SEG);                                   \
00093         core.base_val_ds=_SEG;                                  \
00094         goto restart_opcode;
00095 
00096 // it's the core's job not to decode 0x66-0x67 when compiled for 286
00097 #define DO_PREFIX_ADDR()                                                                \
00098         abort();                                                                        
00099 
00100 #define DO_PREFIX_REP(_ZERO)                            \
00101     if (GETFLAG(IF) && CPU_Cycles <= 0) goto prefix_out; \
00102         core.prefixes|=PREFIX_REP;                              \
00103         core.rep_zero=_ZERO;                                    \
00104         goto restart_opcode;
00105 
00106 typedef PhysPt (*GetEAHandler)(void);
00107 
00108 static const Bit32u AddrMaskTable[2]={0x0000ffffu,0x0000ffffu};
00109 
00110 static struct {
00111         Bitu opcode_index;
00112         PhysPt cseip;
00113         PhysPt base_ds,base_ss;
00114         SegNames base_val_ds;
00115         bool rep_zero;
00116         Bitu prefixes;
00117         GetEAHandler * ea_table;
00118 } core;
00119 
00120 /* FIXME: Someone at Microsoft tell how subtracting PhysPt - PhysPt = __int64, or PhysPt + PhysPt = __int64 */
00121 #define GETIP           ((PhysPt)(core.cseip-SegBase(cs)))
00122 #define SAVEIP          reg_eip=GETIP;
00123 #define LOADIP          core.cseip=((PhysPt)(SegBase(cs)+reg_eip));
00124 
00125 #define SAVEIP_PREFIX           reg_eip=GETIP-1;
00126 
00127 #define SegBase(c)      SegPhys(c)
00128 #define BaseDS          core.base_ds
00129 #define BaseSS          core.base_ss
00130 
00131 static INLINE void FetchDiscardb() {
00132         core.cseip+=1;
00133 }
00134 
00135 static INLINE Bit8u FetchPeekb() {
00136         Bit8u temp=LoadMb(core.cseip);
00137         return temp;
00138 }
00139 
00140 static INLINE Bit8u Fetchb() {
00141         Bit8u temp=LoadMb(core.cseip);
00142         core.cseip+=1;
00143         return temp;
00144 }
00145 
00146 static INLINE Bit16u Fetchw() {
00147         Bit16u temp=LoadMw(core.cseip);
00148         core.cseip+=2;
00149         return temp;
00150 }
00151 static INLINE Bit32u Fetchd() {
00152         Bit32u temp=LoadMd(core.cseip);
00153         core.cseip+=4;
00154         return temp;
00155 }
00156 
00157 #define Push_16 CPU_Push16
00158 #define Pop_16 CPU_Pop16
00159 
00160 #include "instructions.h"
00161 #include "core_normal/support.h"
00162 #include "core_normal/string.h"
00163 
00164 
00165 #define EALookupTable (core.ea_table)
00166 
00167 Bits CPU_Core286_Normal_Run(void) {
00168     if (CPU_Cycles <= 0)
00169             return CBRET_NONE;
00170 
00171         while (CPU_Cycles-->0) {
00172                 LOADIP;
00173                 core.prefixes=0;
00174                 core.opcode_index=0;
00175                 core.ea_table=&EATable[0];
00176                 BaseDS=SegBase(ds);
00177                 BaseSS=SegBase(ss);
00178                 core.base_val_ds=ds;
00179 #if C_DEBUG
00180 #if C_HEAVY_DEBUG
00181                 if (DEBUG_HeavyIsBreakpoint()) {
00182                         FillFlags();
00183                         return (Bits)debugCallback;
00184                 }
00185 #endif
00186 #endif
00187                 cycle_count++;
00188 restart_opcode:
00189                 switch (core.opcode_index+Fetchb()) {
00190                 #include "core_normal/prefix_none.h"
00191                 #include "core_normal/prefix_0f.h"
00192                 default:
00193                 illegal_opcode:
00194 #if C_DEBUG     
00195                         {
00196                                 bool ignore=false;
00197                                 Bitu len=(GETIP-reg_eip);
00198                                 LOADIP;
00199                                 if (len>16) len=16;
00200                                 char tempcode[16*2+1];char * writecode=tempcode;
00201                                 if (ignore_opcode_63 && mem_readb(core.cseip) == 0x63)
00202                                         ignore = true;
00203                                 for (;len>0;len--) {
00204                                         sprintf(writecode,"%02X",mem_readb(core.cseip++));
00205                                         writecode+=2;
00206                                 }
00207                                 if (!ignore)
00208                                         LOG(LOG_CPU,LOG_NORMAL)("Illegal/Unhandled opcode %s",tempcode);
00209                         }
00210 #endif
00211                         CPU_Exception(6,0);
00212                         continue;
00213                 gp_fault:
00214                         CPU_Exception(EXCEPTION_GP,0);
00215                         continue;
00216                 }
00217                 SAVEIP;
00218         }
00219         FillFlags();
00220         return CBRET_NONE;
00221 /* 8086/286 multiple prefix interrupt bug emulation.
00222  * If an instruction is interrupted, only the last prefix is restarted.
00223  * See also [https://www.pcjs.org/pubs/pc/reference/intel/8086/] and [https://www.youtube.com/watch?v=6FC-tcwMBnU] */ 
00224 prefix_out:
00225         SAVEIP_PREFIX;
00226         FillFlags();
00227         return CBRET_NONE;
00228 decode_end:
00229         SAVEIP;
00230         FillFlags();
00231         return CBRET_NONE;
00232 }
00233 
00234 Bits CPU_Core286_Normal_Trap_Run(void) {
00235         Bits oldCycles = CPU_Cycles;
00236         CPU_Cycles = 1;
00237         cpu.trap_skip = false;
00238 
00239         Bits ret=CPU_Core286_Normal_Run();
00240         if (!cpu.trap_skip) CPU_HW_Interrupt(1);
00241         CPU_Cycles = oldCycles-1;
00242         cpudecoder = &CPU_Core286_Normal_Run;
00243 
00244         return ret;
00245 }
00246 
00247 
00248 
00249 void CPU_Core286_Normal_Init(void) {
00250 
00251 }
00252