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src/cpu/core_normal_286.cpp
00001 /*
00002  *  Copyright (C) 2002-2015  The DOSBox Team
00003  *
00004  *  This program is free software; you can redistribute it and/or modify
00005  *  it under the terms of the GNU General Public License as published by
00006  *  the Free Software Foundation; either version 2 of the License, or
00007  *  (at your option) any later version.
00008  *
00009  *  This program is distributed in the hope that it will be useful,
00010  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
00011  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012  *  GNU General Public License for more details.
00013  *
00014  *  You should have received a copy of the GNU General Public License
00015  *  along with this program; if not, write to the Free Software
00016  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
00017  */
00018 
00019 #include <stdio.h>
00020 
00021 #include "dosbox.h"
00022 #include "mem.h"
00023 #include "cpu.h"
00024 #include "lazyflags.h"
00025 #include "inout.h"
00026 #include "callback.h"
00027 #include "pic.h"
00028 #include "fpu.h"
00029 #include "paging.h"
00030 #include "mmx.h"
00031 
00032 bool CPU_RDMSR();
00033 bool CPU_WRMSR();
00034 
00035 #define CPU_CORE CPU_ARCHTYPE_286
00036 #define CPU_Core_Normal_Trap_Run CPU_Core286_Normal_Trap_Run
00037 
00038 #define DoString DoString_Normal286
00039 
00040 extern bool ignore_opcode_63;
00041 
00042 #if C_DEBUG
00043 #include "debug.h"
00044 #endif
00045 
00046 #if (!C_CORE_INLINE)
00047 #define LoadMb(off) mem_readb(off)
00048 #define LoadMw(off) mem_readw(off)
00049 #define LoadMd(off) mem_readd(off)
00050 #define LoadMq(off) ((Bit64u)((Bit64u)mem_readd(off+4)<<32 | (Bit64u)mem_readd(off)))
00051 #define SaveMb(off,val) mem_writeb(off,val)
00052 #define SaveMw(off,val) mem_writew(off,val)
00053 #define SaveMd(off,val) mem_writed(off,val)
00054 #define SaveMq(off,val) {mem_writed(off,val&0xffffffff);mem_writed(off+4,(val>>32)&0xffffffff);}
00055 #else 
00056 #include "paging.h"
00057 #define LoadMb(off) mem_readb_inline(off)
00058 #define LoadMw(off) mem_readw_inline(off)
00059 #define LoadMd(off) mem_readd_inline(off)
00060 #define LoadMq(off) ((Bit64u)((Bit64u)mem_readd_inline(off+4)<<32 | (Bit64u)mem_readd_inline(off)))
00061 #define SaveMb(off,val) mem_writeb_inline(off,val)
00062 #define SaveMw(off,val) mem_writew_inline(off,val)
00063 #define SaveMd(off,val) mem_writed_inline(off,val)
00064 #define SaveMq(off,val) {mem_writed_inline(off,val&0xffffffff);mem_writed_inline(off+4,(val>>32)&0xffffffff);}
00065 #endif
00066 
00067 extern Bitu cycle_count;
00068 
00069 #if C_FPU
00070 #define CPU_FPU 1u                                              //Enable FPU escape instructions
00071 #endif
00072 
00073 #define CPU_PIC_CHECK 1u
00074 #define CPU_TRAP_CHECK 1u
00075 
00076 #define OPCODE_NONE                     0x000u
00077 #define OPCODE_0F                       0x100u
00078 
00079 #define OPCODE_SIZE                     0u                      //DISABLED
00080 
00081 #define PREFIX_ADDR                     0u                      //DISABLED
00082 
00083 #define PREFIX_REP                      0x2u
00084 
00085 #define TEST_PREFIX_ADDR        (0u)                            //DISABLED
00086 #define TEST_PREFIX_REP         (core.prefixes & PREFIX_REP)
00087 
00088 #define DO_PREFIX_SEG(_SEG)                                     \
00089         BaseDS=SegBase(_SEG);                                   \
00090         BaseSS=SegBase(_SEG);                                   \
00091         core.base_val_ds=_SEG;                                  \
00092         goto restart_opcode;
00093 
00094 // it's the core's job not to decode 0x66-0x67 when compiled for 286
00095 #define DO_PREFIX_ADDR()                                                                \
00096         abort();                                                                        
00097 
00098 #define DO_PREFIX_REP(_ZERO)                            \
00099         core.prefixes|=PREFIX_REP;                              \
00100         core.rep_zero=_ZERO;                                    \
00101         goto restart_opcode;
00102 
00103 typedef PhysPt (*GetEAHandler)(void);
00104 
00105 static const Bit32u AddrMaskTable[2]={0x0000ffffu,0x0000ffffu};
00106 
00107 static struct {
00108         Bitu opcode_index;
00109         PhysPt cseip;
00110         PhysPt base_ds,base_ss;
00111         SegNames base_val_ds;
00112         bool rep_zero;
00113         Bitu prefixes;
00114         GetEAHandler * ea_table;
00115 } core;
00116 
00117 /* FIXME: Someone at Microsoft tell how subtracting PhysPt - PhysPt = __int64, or PhysPt + PhysPt = __int64 */
00118 #define GETIP           ((PhysPt)(core.cseip-SegBase(cs)))
00119 #define SAVEIP          reg_eip=GETIP;
00120 #define LOADIP          core.cseip=((PhysPt)(SegBase(cs)+reg_eip));
00121 
00122 #define SegBase(c)      SegPhys(c)
00123 #define BaseDS          core.base_ds
00124 #define BaseSS          core.base_ss
00125 
00126 static INLINE Bit8u Fetchb() {
00127         Bit8u temp=LoadMb(core.cseip);
00128         core.cseip+=1;
00129         return temp;
00130 }
00131 
00132 static INLINE Bit16u Fetchw() {
00133         Bit16u temp=LoadMw(core.cseip);
00134         core.cseip+=2;
00135         return temp;
00136 }
00137 static INLINE Bit32u Fetchd() {
00138         Bit32u temp=LoadMd(core.cseip);
00139         core.cseip+=4;
00140         return temp;
00141 }
00142 
00143 #define Push_16 CPU_Push16
00144 #define Pop_16 CPU_Pop16
00145 
00146 #include "instructions.h"
00147 #include "core_normal/support.h"
00148 #include "core_normal/string.h"
00149 
00150 
00151 #define EALookupTable (core.ea_table)
00152 
00153 Bits CPU_Core286_Normal_Run(void) {
00154         while (CPU_Cycles-->0) {
00155                 LOADIP;
00156                 core.prefixes=0;
00157                 core.opcode_index=0;
00158                 core.ea_table=&EATable[0];
00159                 BaseDS=SegBase(ds);
00160                 BaseSS=SegBase(ss);
00161                 core.base_val_ds=ds;
00162 #if C_DEBUG
00163 #if C_HEAVY_DEBUG
00164                 if (DEBUG_HeavyIsBreakpoint()) {
00165                         FillFlags();
00166                         return (Bits)debugCallback;
00167                 };
00168 #endif
00169 #endif
00170                 cycle_count++;
00171 restart_opcode:
00172                 switch (core.opcode_index+Fetchb()) {
00173                 #include "core_normal/prefix_none.h"
00174                 #include "core_normal/prefix_0f.h"
00175                 default:
00176                 illegal_opcode:
00177 #if C_DEBUG     
00178                         {
00179                                 bool ignore=false;
00180                                 Bitu len=(GETIP-reg_eip);
00181                                 LOADIP;
00182                                 if (len>16) len=16;
00183                                 char tempcode[16*2+1];char * writecode=tempcode;
00184                                 if (ignore_opcode_63 && mem_readb(core.cseip) == 0x63)
00185                                         ignore = true;
00186                                 for (;len>0;len--) {
00187                                         sprintf(writecode,"%02X",mem_readb(core.cseip++));
00188                                         writecode+=2;
00189                                 }
00190                                 if (!ignore)
00191                                         LOG(LOG_CPU,LOG_NORMAL)("Illegal/Unhandled opcode %s",tempcode);
00192                         }
00193 #endif
00194                         CPU_Exception(6,0);
00195                         continue;
00196                 gp_fault:
00197                         CPU_Exception(EXCEPTION_GP,0);
00198                         continue;
00199                 }
00200                 SAVEIP;
00201         }
00202         FillFlags();
00203         return CBRET_NONE;
00204 decode_end:
00205         SAVEIP;
00206         FillFlags();
00207         return CBRET_NONE;
00208 }
00209 
00210 Bits CPU_Core286_Normal_Trap_Run(void) {
00211         Bits oldCycles = CPU_Cycles;
00212         CPU_Cycles = 1;
00213         cpu.trap_skip = false;
00214 
00215         Bits ret=CPU_Core286_Normal_Run();
00216         if (!cpu.trap_skip) CPU_HW_Interrupt(1);
00217         CPU_Cycles = oldCycles-1;
00218         cpudecoder = &CPU_Core286_Normal_Run;
00219 
00220         return ret;
00221 }
00222 
00223 
00224 
00225 void CPU_Core286_Normal_Init(void) {
00226 
00227 }
00228