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include/cpu.h
00001 /*
00002  *  Copyright (C) 2002-2015  The DOSBox Team
00003  *
00004  *  This program is free software; you can redistribute it and/or modify
00005  *  it under the terms of the GNU General Public License as published by
00006  *  the Free Software Foundation; either version 2 of the License, or
00007  *  (at your option) any later version.
00008  *
00009  *  This program is distributed in the hope that it will be useful,
00010  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
00011  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012  *  GNU General Public License for more details.
00013  *
00014  *  You should have received a copy of the GNU General Public License
00015  *  along with this program; if not, write to the Free Software
00016  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
00017  */
00018 
00019 
00020 #ifndef DOSBOX_CPU_H
00021 #define DOSBOX_CPU_H
00022 
00023 #ifndef DOSBOX_DOSBOX_H
00024 #include "dosbox.h" 
00025 #endif
00026 #ifndef DOSBOX_REGS_H
00027 #include "regs.h"
00028 #endif
00029 #ifndef DOSBOX_MEM_H
00030 #include "mem.h"
00031 #endif
00032 
00033 #define CPU_AUTODETERMINE_NONE          0x00
00034 #define CPU_AUTODETERMINE_CORE          0x01
00035 #define CPU_AUTODETERMINE_CYCLES        0x02
00036 
00037 #define CPU_AUTODETERMINE_SHIFT         0x02
00038 #define CPU_AUTODETERMINE_MASK          0x03
00039 
00040 #define CPU_CYCLES_LOWER_LIMIT          100
00041 
00042 
00043 #define CPU_ARCHTYPE_MIXED                      0xff
00044 #define CPU_ARCHTYPE_8086                       0x05
00045 #define CPU_ARCHTYPE_80186                      0x15
00046 #define CPU_ARCHTYPE_286                        0x25
00047 #define CPU_ARCHTYPE_386                        0x35
00048 #define CPU_ARCHTYPE_486OLD                     0x40
00049 #define CPU_ARCHTYPE_486NEW                     0x45
00050 #define CPU_ARCHTYPE_PENTIUM            0x50
00051 #define CPU_ARCHTYPE_P55CSLOW           0x55
00052 #define CPU_ARCHTYPE_PPROSLOW           0x60
00053 
00054 /* CPU Cycle Timing */
00055 extern cpu_cycles_count_t CPU_Cycles;
00056 extern cpu_cycles_count_t CPU_CycleLeft;
00057 extern cpu_cycles_count_t CPU_CycleMax;
00058 extern cpu_cycles_count_t CPU_OldCycleMax;
00059 extern cpu_cycles_count_t CPU_CyclePercUsed;
00060 extern cpu_cycles_count_t CPU_CycleLimit;
00061 extern cpu_cycles_count_t CPU_IODelayRemoved;
00062 extern cpu_cycles_count_t CPU_CyclesSet;
00063 extern unsigned char CPU_AutoDetermineMode;
00064 extern char core_mode[16];
00065 
00066 extern bool CPU_CycleAutoAdjust;
00067 extern bool CPU_SkipCycleAutoAdjust;
00068 
00069 extern bool enable_weitek;
00070 
00071 extern unsigned char CPU_ArchitectureType;
00072 
00073 extern unsigned int CPU_PrefetchQueueSize;
00074 
00075 /* Some common Defines */
00076 /* A CPU Handler */
00077 typedef Bits (CPU_Decoder)(void);
00078 extern CPU_Decoder * cpudecoder;
00079 
00080 Bits CPU_Core_Normal_Run(void);
00081 Bits CPU_Core_Normal_Trap_Run(void);
00082 Bits CPU_Core_Simple_Run(void);
00083 Bits CPU_Core_Full_Run(void);
00084 Bits CPU_Core_Dyn_X86_Run(void);
00085 Bits CPU_Core_Dyn_X86_Trap_Run(void);
00086 Bits CPU_Core_Dynrec_Run(void);
00087 Bits CPU_Core_Dynrec_Trap_Run(void);
00088 Bits CPU_Core_Prefetch_Run(void);
00089 Bits CPU_Core_Prefetch_Trap_Run(void);
00090 
00091 Bits CPU_Core286_Normal_Run(void);
00092 Bits CPU_Core286_Normal_Trap_Run(void);
00093 
00094 Bits CPU_Core8086_Normal_Run(void);
00095 Bits CPU_Core8086_Normal_Trap_Run(void);
00096 
00097 void CPU_Enable_SkipAutoAdjust(void);
00098 void CPU_Disable_SkipAutoAdjust(void);
00099 void CPU_Reset_AutoAdjust(void);
00100 
00101 
00102 //CPU Stuff
00103 
00104 extern Bit16u parity_lookup[256];
00105 
00106 void CPU_SetCPL(Bitu newcpl);
00107 bool CPU_LLDT(Bitu selector);
00108 bool CPU_LTR(Bitu selector);
00109 void CPU_LIDT(Bitu limit,Bitu base);
00110 void CPU_LGDT(Bitu limit,Bitu base);
00111 
00112 Bitu CPU_STR(void);
00113 Bitu CPU_SLDT(void);
00114 Bitu CPU_SIDT_base(void);
00115 Bitu CPU_SIDT_limit(void);
00116 Bitu CPU_SGDT_base(void);
00117 Bitu CPU_SGDT_limit(void);
00118 
00119 void CPU_ARPL(Bitu & dest_sel,Bitu src_sel);
00120 void CPU_LAR(Bitu selector,Bitu & ar);
00121 void CPU_LSL(Bitu selector,Bitu & limit);
00122 
00123 void CPU_SET_CRX(Bitu cr,Bitu value);
00124 bool CPU_WRITE_CRX(Bitu cr,Bitu value);
00125 Bitu CPU_GET_CRX(Bitu cr);
00126 bool CPU_READ_CRX(Bitu cr,Bit32u & retvalue);
00127 
00128 bool CPU_WRITE_DRX(Bitu dr,Bitu value);
00129 bool CPU_READ_DRX(Bitu dr,Bit32u & retvalue);
00130 
00131 bool CPU_WRITE_TRX(Bitu dr,Bitu value);
00132 bool CPU_READ_TRX(Bitu dr,Bit32u & retvalue);
00133 
00134 Bitu CPU_SMSW(void);
00135 bool CPU_LMSW(Bitu word);
00136 
00137 void CPU_VERR(Bitu selector);
00138 void CPU_VERW(Bitu selector);
00139 
00140 void CPU_JMP(bool use32,Bitu selector,Bitu offset,Bitu oldeip);
00141 void CPU_CALL(bool use32,Bitu selector,Bitu offset,Bitu oldeip);
00142 void CPU_RET(bool use32,Bitu bytes,Bitu oldeip);
00143 void CPU_IRET(bool use32,Bitu oldeip);
00144 void CPU_HLT(Bitu oldeip);
00145 
00146 bool CPU_POPF(Bitu use32);
00147 bool CPU_PUSHF(Bitu use32);
00148 bool CPU_CLI(void);
00149 bool CPU_STI(void);
00150 
00151 bool CPU_IO_Exception(Bitu port,Bitu size);
00152 void CPU_RunException(void);
00153 
00154 void CPU_ENTER(bool use32,Bitu bytes,Bitu level);
00155 void init_vm86_fake_io();
00156 
00157 #define CPU_INT_SOFTWARE                0x1
00158 #define CPU_INT_EXCEPTION               0x2
00159 #define CPU_INT_HAS_ERROR               0x4
00160 #define CPU_INT_NOIOPLCHECK             0x8
00161 
00162 extern bool CPU_NMI_gate;
00163 extern bool CPU_NMI_active;
00164 extern bool CPU_NMI_pending;
00165 
00166 extern bool do_seg_limits;
00167 
00168 void CPU_Interrupt(Bitu num,Bitu type,Bitu oldeip);
00169 void CPU_Check_NMI();
00170 void CPU_Raise_NMI();
00171 void CPU_NMI_Interrupt();
00172 static INLINE void CPU_HW_Interrupt(Bitu num) {
00173         CPU_Interrupt(num,0,reg_eip);
00174 }
00175 static INLINE void CPU_SW_Interrupt(Bitu num,Bitu oldeip) {
00176         CPU_Interrupt(num,CPU_INT_SOFTWARE,oldeip);
00177 }
00178 static INLINE void CPU_SW_Interrupt_NoIOPLCheck(Bitu num,Bitu oldeip) {
00179         CPU_Interrupt(num,CPU_INT_SOFTWARE|CPU_INT_NOIOPLCHECK,oldeip);
00180 }
00181 
00182 bool CPU_PrepareException(Bitu which,Bitu error);
00183 void CPU_Exception(Bitu which,Bitu error=0);
00184 
00185 bool CPU_SetSegGeneral(SegNames seg,Bitu value);
00186 bool CPU_PopSeg(SegNames seg,bool use32);
00187 
00188 bool CPU_CPUID(void);
00189 Bitu CPU_Pop16(void);
00190 Bitu CPU_Pop32(void);
00191 void CPU_Push16(Bitu value);
00192 void CPU_Push32(Bitu value);
00193 
00194 void CPU_SetFlags(Bitu word,Bitu mask);
00195 
00196 
00197 #define EXCEPTION_UD                    6u
00198 #define EXCEPTION_DF            8u
00199 #define EXCEPTION_TS                    10u
00200 #define EXCEPTION_NP                    11u
00201 #define EXCEPTION_SS                    12u
00202 #define EXCEPTION_GP                    13u
00203 #define EXCEPTION_PF                    14u
00204 
00205 #define CR0_PROTECTION                  0x00000001u
00206 #define CR0_MONITORPROCESSOR    0x00000002u
00207 #define CR0_FPUEMULATION                0x00000004u
00208 #define CR0_TASKSWITCH                  0x00000008u
00209 #define CR0_FPUPRESENT                  0x00000010u
00210 #define CR0_WRITEPROTECT                0x00010000u
00211 #define CR0_PAGING                              0x80000000u
00212 
00213 
00214 // *********************************************************************
00215 // Descriptor
00216 // *********************************************************************
00217 
00218 #define DESC_INVALID                            0x00u
00219 #define DESC_286_TSS_A                          0x01u
00220 #define DESC_LDT                                        0x02u
00221 #define DESC_286_TSS_B                          0x03u
00222 #define DESC_286_CALL_GATE                      0x04u
00223 #define DESC_TASK_GATE                          0x05u
00224 #define DESC_286_INT_GATE                       0x06u
00225 #define DESC_286_TRAP_GATE                      0x07u
00226 
00227 #define DESC_386_TSS_A                          0x09u
00228 #define DESC_386_TSS_B                          0x0bu
00229 #define DESC_386_CALL_GATE                      0x0cu
00230 #define DESC_386_INT_GATE                       0x0eu
00231 #define DESC_386_TRAP_GATE                      0x0fu
00232 
00233 /* EU/ED Expand UP/DOWN RO/RW Read Only/Read Write NA/A Accessed */
00234 #define DESC_DATA_EU_RO_NA                      0x10u
00235 #define DESC_DATA_EU_RO_A                       0x11u
00236 #define DESC_DATA_EU_RW_NA                      0x12u
00237 #define DESC_DATA_EU_RW_A                       0x13u
00238 #define DESC_DATA_ED_RO_NA                      0x14u
00239 #define DESC_DATA_ED_RO_A                       0x15u
00240 #define DESC_DATA_ED_RW_NA                      0x16u
00241 #define DESC_DATA_ED_RW_A                       0x17u
00242 
00243 /* N/R Readable  NC/C Confirming A/NA Accessed */
00244 #define DESC_CODE_N_NC_A                        0x18u
00245 #define DESC_CODE_N_NC_NA                       0x19u
00246 #define DESC_CODE_R_NC_A                        0x1au
00247 #define DESC_CODE_R_NC_NA                       0x1bu
00248 #define DESC_CODE_N_C_A                         0x1cu
00249 #define DESC_CODE_N_C_NA                        0x1du
00250 #define DESC_CODE_R_C_A                         0x1eu
00251 #define DESC_CODE_R_C_NA                        0x1fu
00252 
00253 #ifdef _MSC_VER
00254 #pragma pack (1)
00255 #endif
00256 
00257 struct S_Descriptor {
00258 #ifdef WORDS_BIGENDIAN
00259         Bit32u base_0_15        :16;
00260         Bit32u limit_0_15       :16;
00261         Bit32u base_24_31       :8;
00262         Bit32u g                        :1;
00263         Bit32u big                      :1;
00264         Bit32u r                        :1;
00265         Bit32u avl                      :1;
00266         Bit32u limit_16_19      :4;
00267         Bit32u p                        :1;
00268         Bit32u dpl                      :2;
00269         Bit32u type                     :5;
00270         Bit32u base_16_23       :8;
00271 #else
00272         Bit32u limit_0_15       :16;
00273         Bit32u base_0_15        :16;
00274         Bit32u base_16_23       :8;
00275         Bit32u type                     :5;
00276         Bit32u dpl                      :2;
00277         Bit32u p                        :1;
00278         Bit32u limit_16_19      :4;
00279         Bit32u avl                      :1;
00280         Bit32u r                        :1;
00281         Bit32u big                      :1;
00282         Bit32u g                        :1;
00283         Bit32u base_24_31       :8;
00284 #endif
00285 }GCC_ATTRIBUTE(packed);
00286 
00287 struct G_Descriptor {
00288 #ifdef WORDS_BIGENDIAN
00289         Bit32u selector:        16;
00290         Bit32u offset_0_15      :16;
00291         Bit32u offset_16_31     :16;
00292         Bit32u p                        :1;
00293         Bit32u dpl                      :2;
00294         Bit32u type                     :5;
00295         Bit32u reserved         :3;
00296         Bit32u paramcount       :5;
00297 #else
00298         Bit32u offset_0_15      :16;
00299         Bit32u selector         :16;
00300         Bit32u paramcount       :5;
00301         Bit32u reserved         :3;
00302         Bit32u type                     :5;
00303         Bit32u dpl                      :2;
00304         Bit32u p                        :1;
00305         Bit32u offset_16_31     :16;
00306 #endif
00307 } GCC_ATTRIBUTE(packed);
00308 
00309 struct TSS_16 { 
00310     Bit16u back;                 /* Back link to other task */
00311     Bit16u sp0;                              /* The CK stack pointer */
00312     Bit16u ss0;                                  /* The CK stack selector */
00313         Bit16u sp1;                  /* The parent KL stack pointer */
00314     Bit16u ss1;                  /* The parent KL stack selector */
00315         Bit16u sp2;                  /* Unused */
00316     Bit16u ss2;                  /* Unused */
00317     Bit16u ip;                   /* The instruction pointer */
00318     Bit16u flags;                /* The flags */
00319     Bit16u ax, cx, dx, bx;       /* The general purpose registers */
00320     Bit16u sp, bp, si, di;       /* The special purpose registers */
00321     Bit16u es;                   /* The extra selector */
00322     Bit16u cs;                   /* The code selector */
00323     Bit16u ss;                   /* The application stack selector */
00324     Bit16u ds;                   /* The data selector */
00325     Bit16u ldt;                  /* The local descriptor table */
00326 } GCC_ATTRIBUTE(packed);
00327 
00328 struct TSS_32 { 
00329     Bit32u back;                /* Back link to other task */
00330         Bit32u esp0;                     /* The CK stack pointer */
00331     Bit32u ss0;                                  /* The CK stack selector */
00332         Bit32u esp1;                 /* The parent KL stack pointer */
00333     Bit32u ss1;                  /* The parent KL stack selector */
00334         Bit32u esp2;                 /* Unused */
00335     Bit32u ss2;                  /* Unused */
00336         Bit32u cr3;                  /* The page directory pointer */
00337     Bit32u eip;                  /* The instruction pointer */
00338     Bit32u eflags;               /* The flags */
00339     Bit32u eax, ecx, edx, ebx;   /* The general purpose registers */
00340     Bit32u esp, ebp, esi, edi;   /* The special purpose registers */
00341     Bit32u es;                   /* The extra selector */
00342     Bit32u cs;                   /* The code selector */
00343     Bit32u ss;                   /* The application stack selector */
00344     Bit32u ds;                   /* The data selector */
00345     Bit32u fs;                   /* And another extra selector */
00346     Bit32u gs;                   /* ... and another one */
00347     Bit32u ldt;                  /* The local descriptor table */
00348 } GCC_ATTRIBUTE(packed);
00349 
00350 #ifdef _MSC_VER
00351 #pragma pack()
00352 #endif
00353 class Descriptor
00354 {
00355 public:
00356         Descriptor() { saved.fill[0]=saved.fill[1]=0; }
00357 
00358         void Load(PhysPt address);
00359         void Save(PhysPt address);
00360 
00361     PhysPt GetBase (void) const {
00362         return (PhysPt)(
00363             ((PhysPt)saved.seg.base_24_31 << (PhysPt)24U) |
00364             ((PhysPt)saved.seg.base_16_23 << (PhysPt)16U) |
00365              (PhysPt)saved.seg.base_0_15);
00366     }
00367         bool GetExpandDown (void) {
00368 #if 0
00369         Bit32u limit_0_15       :16;
00370         Bit32u base_0_15        :16;
00371         Bit32u base_16_23       :8;
00372         Bit32u type                     :5;
00373         Bit32u dpl                      :2;
00374         Bit32u p                        :1;
00375         Bit32u limit_16_19      :4;
00376         Bit32u avl                      :1;
00377         Bit32u r                        :1;
00378         Bit32u big                      :1;
00379         Bit32u g                        :1;
00380         Bit32u base_24_31       :8;
00381 #endif
00382                 if (!(saved.seg.type & 0x10)) /* must be storage type descriptor */
00383                         return false;
00384 
00385                 /* type: 1 0 E W A for data */
00386                 /* type: 1 1 C R A for code */
00387                 if (saved.seg.type & 0x08)
00388                         return false;
00389 
00390                 /* it's data. return the 'E' bit */
00391                 return (saved.seg.type & 4) != 0;
00392         }
00393         Bitu GetLimit (void) const {
00394                 const Bitu limit = ((Bitu)saved.seg.limit_16_19 << (Bitu)16U) | (Bitu)saved.seg.limit_0_15;
00395                 if (saved.seg.g) return ((Bitu)limit << (Bitu)12U) | (Bitu)0xFFFU;
00396                 return limit;
00397         }
00398         Bitu GetOffset(void) const {
00399                 return ((Bitu)saved.gate.offset_16_31 << (Bitu)16U) | (Bitu)saved.gate.offset_0_15;
00400         }
00401         Bitu GetSelector(void) const {
00402                 return saved.gate.selector;
00403         }
00404         Bitu Type(void) const {
00405                 return saved.seg.type;
00406         }
00407         Bitu Conforming(void) const {
00408                 return saved.seg.type & 8U;
00409         }
00410         Bitu DPL(void) const {
00411                 return saved.seg.dpl;
00412         }
00413         Bitu Big(void) const {
00414                 return saved.seg.big;
00415         }
00416 public:
00417         union {
00418                 S_Descriptor seg;
00419                 G_Descriptor gate;
00420                 Bit32u fill[2];
00421         } saved;
00422 };
00423 
00424 class DescriptorTable {
00425 public:
00426     PhysPt  GetBase         (void) const    { return table_base;    }
00427     Bitu    GetLimit        (void) const    { return table_limit;   }
00428     void    SetBase         (PhysPt _base)  { table_base = _base;   }
00429     void    SetLimit        (Bitu _limit)   { table_limit= _limit;  }
00430 
00431     bool GetDescriptor  (Bitu selector, Descriptor& desc) {
00432         selector&=~7U;
00433         if (selector>=table_limit) return false;
00434         desc.Load((PhysPt)(table_base+selector));
00435         return true;
00436     }
00437 
00438 protected:
00439     PhysPt table_base;
00440     Bitu table_limit;
00441 };
00442 
00443 class GDTDescriptorTable : public DescriptorTable {
00444 public:
00445         bool GetDescriptor(Bitu selector, Descriptor& desc) {
00446                 Bitu address=selector & ~7U;
00447                 if (selector & 4U) {
00448                         if (address>=ldt_limit) return false;
00449                         desc.Load((PhysPt)(ldt_base+address));
00450                         return true;
00451                 } else {
00452                         if (address>=table_limit) return false;
00453                         desc.Load((PhysPt)(table_base+address));
00454                         return true;
00455                 }
00456         }
00457         bool SetDescriptor(Bitu selector, Descriptor& desc) {
00458                 Bitu address=selector & ~7U;
00459                 if (selector & 4U) {
00460                         if (address>=ldt_limit) return false;
00461                         desc.Save((PhysPt)(ldt_base+address));
00462                         return true;
00463                 } else {
00464                         if (address>=table_limit) return false;
00465                         desc.Save((PhysPt)(table_base+address));
00466                         return true;
00467                 }
00468         } 
00469         Bitu SLDT(void) const {
00470                 return ldt_value;
00471         }
00472         bool LLDT(Bitu value) {
00473                 if ((value&0xfffc)==0) {
00474                         ldt_value=0;
00475                         ldt_base=0;
00476                         ldt_limit=0;
00477                         return true;
00478                 }
00479                 Descriptor desc;
00480                 if (!GetDescriptor(value,desc)) return !CPU_PrepareException(EXCEPTION_GP,value);
00481                 if (desc.Type()!=DESC_LDT) return !CPU_PrepareException(EXCEPTION_GP,value);
00482                 if (!desc.saved.seg.p) return !CPU_PrepareException(EXCEPTION_NP,value);
00483                 ldt_base=desc.GetBase();
00484                 ldt_limit=desc.GetLimit();
00485                 ldt_value=value;
00486                 return true;
00487         }
00488 
00489 private:
00490         PhysPt ldt_base;
00491         Bitu ldt_limit;
00492         Bitu ldt_value;
00493 };
00494 
00495 class TSS_Descriptor : public Descriptor {
00496 public:
00497         Bitu IsBusy(void) const {
00498                 return saved.seg.type & 2;
00499         }
00500         Bitu Is386(void) const {
00501                 return saved.seg.type & 8;
00502         }
00503         void SetBusy(const bool busy) {
00504                 if (busy) saved.seg.type|=(2U);
00505                 else saved.seg.type&=(~2U); /* -Wconversion cannot silence without hard-coding ~2U & 0x1F */
00506         }
00507 };
00508 
00509 
00510 struct CPUBlock {
00511         Bitu cpl;                                                       /* Current Privilege */
00512         Bitu mpl;
00513         Bitu cr0;
00514         bool pmode;                                                     /* Is Protected mode enabled */
00515         GDTDescriptorTable gdt;
00516         DescriptorTable idt;
00517         struct {
00518                 Bitu cr0_and;
00519                 Bitu cr0_or;
00520                 Bitu eflags;
00521         } masks;
00522         struct {
00523                 Bitu mask,notmask;
00524                 bool big;
00525         } stack;
00526         struct {
00527                 bool big;
00528         } code;
00529         struct {
00530                 Bitu cs,eip;
00531                 CPU_Decoder * old_decoder;
00532         } hlt;
00533         struct {
00534                 Bitu which,error;
00535         } exception;
00536         Bits direction;
00537         bool trap_skip;
00538         Bit32u drx[8];
00539         Bit32u trx[8];
00540 };
00541 
00542 extern CPUBlock cpu;
00543 
00544 static INLINE void CPU_SetFlagsd(const Bitu word) {
00545         const Bitu mask=cpu.cpl ? FMASK_NORMAL : FMASK_ALL;
00546         CPU_SetFlags(word,mask);
00547 }
00548 
00549 static INLINE void CPU_SetFlagsw(const Bitu word) {
00550         const Bitu mask=(cpu.cpl ? FMASK_NORMAL : FMASK_ALL) & 0xffff;
00551         CPU_SetFlags(word,mask);
00552 }
00553 
00554 Bitu CPU_ForceV86FakeIO_In(Bitu port,Bitu len);
00555 void CPU_ForceV86FakeIO_Out(Bitu port,Bitu val,Bitu len);
00556 
00557 #endif