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src/cpu/core_dyn_x86/dyn_fpu_dh.h
00001 /*
00002  *  Copyright (C) 2002-2013  The DOSBox Team
00003  *
00004  *  This program is free software; you can redistribute it and/or modify
00005  *  it under the terms of the GNU General Public License as published by
00006  *  the Free Software Foundation; either version 2 of the License, or
00007  *  (at your option) any later version.
00008  *
00009  *  This program is distributed in the hope that it will be useful,
00010  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
00011  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012  *  GNU General Public License for more details.
00013  *
00014  *  You should have received a copy of the GNU General Public License
00015  *  along with this program; if not, write to the Free Software
00016  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
00017  */
00018 
00019 
00020 #include "dosbox.h"
00021 #if C_FPU
00022 
00023 static void FPU_FLD_16(PhysPt addr) {
00024         dyn_dh_fpu.temp.m1 = (Bit32u)mem_readw(addr);
00025 }
00026 
00027 static void FPU_FST_16(PhysPt addr) {
00028         mem_writew(addr,(Bit16u)dyn_dh_fpu.temp.m1);
00029 }
00030 
00031 static void FPU_FLD_32(PhysPt addr) {
00032         dyn_dh_fpu.temp.m1 = mem_readd(addr);
00033 }
00034 
00035 static void FPU_FST_32(PhysPt addr) {
00036         mem_writed(addr,dyn_dh_fpu.temp.m1);
00037 }
00038 
00039 static void FPU_FLD_64(PhysPt addr) {
00040         dyn_dh_fpu.temp.m1 = mem_readd(addr);
00041         dyn_dh_fpu.temp.m2 = mem_readd(addr+4);
00042 }
00043 
00044 static void FPU_FST_64(PhysPt addr) {
00045         mem_writed(addr,dyn_dh_fpu.temp.m1);
00046         mem_writed(addr+4,dyn_dh_fpu.temp.m2);
00047 }
00048 
00049 static void FPU_FLD_80(PhysPt addr) {
00050         dyn_dh_fpu.temp.m1 = mem_readd(addr);
00051         dyn_dh_fpu.temp.m2 = mem_readd(addr+4);
00052         dyn_dh_fpu.temp.m3 = mem_readw(addr+8);
00053 }
00054 
00055 static void FPU_FST_80(PhysPt addr) {
00056         mem_writed(addr,dyn_dh_fpu.temp.m1);
00057         mem_writed(addr+4,dyn_dh_fpu.temp.m2);
00058         mem_writew(addr+8,dyn_dh_fpu.temp.m3);
00059 }
00060 
00061 static void FPU_FLDCW_DH(PhysPt addr){
00062         dyn_dh_fpu.cw = mem_readw(addr);
00063         dyn_dh_fpu.temp.m1 = (Bit32u)(dyn_dh_fpu.cw|0x3f);
00064 }
00065 
00066 static void FPU_FNSTCW_DH(PhysPt addr){
00067         mem_writew(addr,(Bit16u)(dyn_dh_fpu.cw&0xffff));
00068 }
00069 
00070 static void FPU_FNINIT_DH(void){
00071         dyn_dh_fpu.cw = 0x37f;
00072 }
00073 
00074 static void FPU_FSTENV_DH(PhysPt addr){
00075         if(!cpu.code.big) {
00076                 mem_writew(addr+0,(Bit16u)dyn_dh_fpu.cw);
00077                 mem_writew(addr+2,(Bit16u)dyn_dh_fpu.temp.m2);
00078                 mem_writew(addr+4,dyn_dh_fpu.temp.m3);
00079         } else { 
00080                 mem_writed(addr+0,dyn_dh_fpu.temp.m1);
00081                 mem_writew(addr+0,(Bit16u)dyn_dh_fpu.cw);
00082                 mem_writed(addr+4,dyn_dh_fpu.temp.m2);
00083                 mem_writed(addr+8,dyn_dh_fpu.temp.m3);
00084         }
00085 }
00086 
00087 static void FPU_FLDENV_DH(PhysPt addr){
00088         if(!cpu.code.big) {
00089                 dyn_dh_fpu.cw = (Bit32u)mem_readw(addr);
00090                 dyn_dh_fpu.temp.m1 = dyn_dh_fpu.cw|0x3f;
00091                 dyn_dh_fpu.temp.m2 = (Bit32u)mem_readw(addr+2);
00092                 dyn_dh_fpu.temp.m3 = mem_readw(addr+4);
00093         } else { 
00094                 dyn_dh_fpu.cw = (Bit32u)mem_readw(addr);
00095                 dyn_dh_fpu.temp.m1 = mem_readd(addr)|0x3f;
00096                 dyn_dh_fpu.temp.m2 = mem_readd(addr+4);
00097                 dyn_dh_fpu.temp.m3 = mem_readw(addr+8);
00098                 dyn_dh_fpu.temp.d1 = mem_readw(addr+10);
00099         }
00100 }
00101 
00102 static void FPU_FSAVE_DH(PhysPt addr){
00103         if (!cpu.code.big) {
00104                 mem_writew(addr,(Bit16u)dyn_dh_fpu.cw);
00105                 addr+=2;
00106                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x04]);
00107                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x05]);
00108                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x08]);
00109                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x09]);
00110                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x0c]);
00111                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x0d]);
00112                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x10]);
00113                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x11]);
00114                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x14]);
00115                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x15]);
00116                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x18]);
00117                 mem_writeb(addr++,dyn_dh_fpu.temp_state[0x19]);
00118                 for(Bitu i=28;i<108;i++) mem_writeb(addr++,dyn_dh_fpu.temp_state[i]);
00119         } else {
00120                 mem_writew(addr,(Bit16u)dyn_dh_fpu.cw);
00121                 addr+=2;
00122                 for(Bitu i=2;i<108;i++) mem_writeb(addr++,dyn_dh_fpu.temp_state[i]);
00123         }
00124 }
00125 
00126 static void FPU_FRSTOR_DH(PhysPt addr){
00127         if (!cpu.code.big) {
00128                 dyn_dh_fpu.cw = (Bit32u)mem_readw(addr);
00129                 dyn_dh_fpu.temp_state[0x00] = mem_readb(addr++)|0x3f;
00130                 dyn_dh_fpu.temp_state[0x01] = mem_readb(addr++);
00131                 dyn_dh_fpu.temp_state[0x04] = mem_readb(addr++);
00132                 dyn_dh_fpu.temp_state[0x05] = mem_readb(addr++);
00133                 dyn_dh_fpu.temp_state[0x08] = mem_readb(addr++);
00134                 dyn_dh_fpu.temp_state[0x09] = mem_readb(addr++);
00135                 dyn_dh_fpu.temp_state[0x0c] = mem_readb(addr++);
00136                 dyn_dh_fpu.temp_state[0x0d] = mem_readb(addr++);
00137                 dyn_dh_fpu.temp_state[0x10] = mem_readb(addr++);
00138                 dyn_dh_fpu.temp_state[0x11] = mem_readb(addr++);
00139                 dyn_dh_fpu.temp_state[0x14] = mem_readb(addr++);
00140                 dyn_dh_fpu.temp_state[0x15] = mem_readb(addr++);
00141                 dyn_dh_fpu.temp_state[0x18] = mem_readb(addr++);
00142                 dyn_dh_fpu.temp_state[0x19] = mem_readb(addr++);
00143                 for(Bitu i=28;i<108;i++) dyn_dh_fpu.temp_state[i] = mem_readb(addr++);
00144         } else {
00145                 dyn_dh_fpu.cw = (Bit32u)mem_readw(addr);
00146                 for(Bitu i=0;i<108;i++) dyn_dh_fpu.temp_state[i] = mem_readb(addr++);
00147                 dyn_dh_fpu.temp_state[0]|=0x3f;
00148         }
00149 }
00150 
00151 static void dh_fpu_esc0(){
00152         dyn_get_modrm(); 
00153         if (decode.modrm.val >= 0xc0) {
00154                 cache_addb(0xd8);
00155                 cache_addb(decode.modrm.val);
00156         } else { 
00157                 dyn_fill_ea();
00158                 gen_call_function((void*)&FPU_FLD_32,"%Ddr",DREG(EA)); 
00159                 cache_addb(0xd8);
00160                 cache_addb(0x05|(decode.modrm.reg<<3));
00161                 cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00162         }
00163 }
00164 
00165 static void dh_fpu_esc1(){
00166         dyn_get_modrm();  
00167         if (decode.modrm.val >= 0xc0) {
00168                 cache_addb(0xd9);
00169                 cache_addb(decode.modrm.val);
00170         } else {
00171                 Bitu group=(decode.modrm.val >> 3) & 7;
00172                 Bitu sub=(decode.modrm.val & 7);
00173                 dyn_fill_ea(); 
00174                 switch(group){
00175                 case 0x00: /* FLD float*/
00176                         gen_call_function((void*)&FPU_FLD_32,"%Ddr",DREG(EA));
00177                         cache_addb(0xd9);
00178                         cache_addb(0x05|(decode.modrm.reg<<3));
00179                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00180                         break;
00181                 case 0x01: /* UNKNOWN */
00182                         LOG(LOG_FPU,LOG_WARN)("ESC EA 1:Unhandled group %d subfunction %d",group,sub);
00183                         break;
00184                 case 0x02: /* FST float*/
00185                         cache_addb(0xd9);
00186                         cache_addb(0x05|(decode.modrm.reg<<3));
00187                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00188                         gen_call_function((void*)&FPU_FST_32,"%Ddr",DREG(EA));
00189                         break;
00190                 case 0x03: /* FSTP float*/
00191                         cache_addb(0xd9);
00192                         cache_addb(0x05|(decode.modrm.reg<<3));
00193                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00194                         gen_call_function((void*)&FPU_FST_32,"%Ddr",DREG(EA));
00195                         break;
00196                 case 0x04: /* FLDENV */
00197                         gen_call_function((void*)&FPU_FLDENV_DH,"%Ddr",DREG(EA));
00198                         cache_addb(0xd9);
00199                         cache_addb(0x05|(decode.modrm.reg<<3));
00200                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00201                         break;
00202                 case 0x05: /* FLDCW */
00203                         gen_call_function((void *)&FPU_FLDCW_DH,"%Ddr",DREG(EA));
00204                         cache_addb(0xd9);
00205                         cache_addb(0x05|(decode.modrm.reg<<3));
00206                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00207                         break;
00208                 case 0x06: /* FSTENV */
00209                         cache_addb(0xd9);
00210                         cache_addb(0x05|(decode.modrm.reg<<3));
00211                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00212                         gen_call_function((void*)&FPU_FSTENV_DH,"%Ddr",DREG(EA));
00213                         break;
00214                 case 0x07:  /* FNSTCW*/
00215                         gen_call_function((void*)&FPU_FNSTCW_DH,"%Ddr",DREG(EA));
00216                         break;
00217                 default:
00218                         LOG(LOG_FPU,LOG_WARN)("ESC EA 1:Unhandled group %d subfunction %d",group,sub);
00219                         break;
00220                 }
00221         }
00222 }
00223 
00224 static void dh_fpu_esc2(){
00225         dyn_get_modrm();  
00226         if (decode.modrm.val >= 0xc0) { 
00227                 cache_addb(0xda);
00228                 cache_addb(decode.modrm.val);
00229         } else {
00230                 dyn_fill_ea(); 
00231                 gen_call_function((void*)&FPU_FLD_32,"%Ddr",DREG(EA)); 
00232                 cache_addb(0xda);
00233                 cache_addb(0x05|(decode.modrm.reg<<3));
00234                 cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00235         }
00236 }
00237 
00238 static void dh_fpu_esc3(){
00239         dyn_get_modrm();  
00240         if (decode.modrm.val >= 0xc0) { 
00241                 Bitu group=(decode.modrm.val >> 3) & 7;
00242                 Bitu sub=(decode.modrm.val & 7);
00243                 switch (group) {
00244                 case 0x04:
00245                         switch (sub) {
00246                         case 0x00:                              //FNENI
00247                         case 0x01:                              //FNDIS
00248                                 LOG(LOG_FPU,LOG_ERROR)("8087 only fpu code used esc 3: group 4: subfuntion :%d",sub);
00249                                 break;
00250                         case 0x02:                              //FNCLEX FCLEX
00251                                 cache_addb(0xdb);
00252                                 cache_addb(decode.modrm.val);
00253                                 break;
00254                         case 0x03:                              //FNINIT FINIT
00255                                 gen_call_function((void*)&FPU_FNINIT_DH,""); 
00256                                 cache_addb(0xdb);
00257                                 cache_addb(decode.modrm.val);
00258                                 break;
00259                         case 0x04:                              //FNSETPM
00260                         case 0x05:                              //FRSTPM
00261 //                              LOG(LOG_FPU,LOG_ERROR)("80267 protected mode (un)set. Nothing done");
00262                                 break;
00263                         default:
00264                                 E_Exit("ESC 3:ILLEGAL OPCODE group %d subfunction %d",group,sub);
00265                         }
00266                         break;
00267                 default:
00268                         LOG(LOG_FPU,LOG_WARN)("ESC 3:Unhandled group %d subfunction %d",group,sub);
00269                         break;
00270                 }
00271         } else {
00272                 Bitu group=(decode.modrm.val >> 3) & 7;
00273                 Bitu sub=(decode.modrm.val & 7);
00274                 dyn_fill_ea(); 
00275                 switch(group){
00276                 case 0x00:      /* FILD */
00277                         gen_call_function((void*)&FPU_FLD_32,"%Ddr",DREG(EA));
00278                         cache_addb(0xdb);
00279                         cache_addb(0x05|(decode.modrm.reg<<3));
00280                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00281                         break;
00282                 case 0x01:      /* FISTTP */
00283                         LOG(LOG_FPU,LOG_WARN)("ESC 3 EA:Unhandled group %d subfunction %d",group,sub);
00284                         break;
00285                 case 0x02:      /* FIST */
00286                         cache_addb(0xdb);
00287                         cache_addb(0x05|(decode.modrm.reg<<3));
00288                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00289                         gen_call_function((void*)&FPU_FST_32,"%Ddr",DREG(EA));
00290                         break;
00291                 case 0x03:      /* FISTP */
00292                         cache_addb(0xdb);
00293                         cache_addb(0x05|(decode.modrm.reg<<3));
00294                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00295                         gen_call_function((void*)&FPU_FST_32,"%Ddr",DREG(EA));
00296                         break;
00297                 case 0x05:      /* FLD 80 Bits Real */
00298                         gen_call_function((void*)&FPU_FLD_80,"%Ddr",DREG(EA));
00299                         cache_addb(0xdb);
00300                         cache_addb(0x05|(decode.modrm.reg<<3));
00301                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00302                         break;
00303                 case 0x07:      /* FSTP 80 Bits Real */
00304                         cache_addb(0xdb);
00305                         cache_addb(0x05|(decode.modrm.reg<<3));
00306                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00307                         gen_call_function((void*)&FPU_FST_80,"%Ddr",DREG(EA));
00308                         break;
00309                 default:
00310                         LOG(LOG_FPU,LOG_WARN)("ESC 3 EA:Unhandled group %d subfunction %d",group,sub);
00311                 }
00312         }
00313 }
00314 
00315 static void dh_fpu_esc4(){
00316         dyn_get_modrm();  
00317         if (decode.modrm.val >= 0xc0) { 
00318                 cache_addb(0xdc);
00319                 cache_addb(decode.modrm.val);
00320         } else { 
00321                 dyn_fill_ea(); 
00322                 gen_call_function((void*)&FPU_FLD_64,"%Ddr",DREG(EA)); 
00323                 cache_addb(0xdc);
00324                 cache_addb(0x05|(decode.modrm.reg<<3));
00325                 cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00326         }
00327 }
00328 
00329 static void dh_fpu_esc5(){
00330         dyn_get_modrm();  
00331         if (decode.modrm.val >= 0xc0) { 
00332                 cache_addb(0xdd);
00333                 cache_addb(decode.modrm.val);
00334         } else {
00335                 dyn_fill_ea(); 
00336                 Bitu group=(decode.modrm.val >> 3) & 7;
00337                 Bitu sub=(decode.modrm.val & 7);
00338                 switch(group){
00339                 case 0x00:  /* FLD double real*/
00340                         gen_call_function((void*)&FPU_FLD_64,"%Ddr",DREG(EA));
00341                         cache_addb(0xdd);
00342                         cache_addb(0x05|(decode.modrm.reg<<3));
00343                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00344                         break;
00345                 case 0x01:  /* FISTTP longint*/
00346                         LOG(LOG_FPU,LOG_WARN)("ESC 5 EA:Unhandled group %d subfunction %d",group,sub);
00347                         break;
00348                 case 0x02:   /* FST double real*/
00349                         cache_addb(0xdd);
00350                         cache_addb(0x05|(decode.modrm.reg<<3));
00351                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00352                         gen_call_function((void*)&FPU_FST_64,"%Ddr",DREG(EA));
00353                         break;
00354                 case 0x03:      /* FSTP double real*/
00355                         cache_addb(0xdd);
00356                         cache_addb(0x05|(decode.modrm.reg<<3));
00357                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00358                         gen_call_function((void*)&FPU_FST_64,"%Ddr",DREG(EA));
00359                         break;
00360                 case 0x04:      /* FRSTOR */
00361                         gen_call_function((void*)&FPU_FRSTOR_DH,"%Ddr",DREG(EA));
00362                         cache_addb(0xdd);
00363                         cache_addb(0x05|(decode.modrm.reg<<3));
00364                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp_state[0])));
00365                         break;
00366                 case 0x06:      /* FSAVE */
00367                         cache_addb(0xdd);
00368                         cache_addb(0x05|(decode.modrm.reg<<3));
00369                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp_state[0])));
00370                         gen_call_function((void*)&FPU_FSAVE_DH,"%Ddr",DREG(EA));
00371                         cache_addb(0xdb);
00372                         cache_addb(0xe3);
00373                         break;
00374                 case 0x07:   /* FNSTSW */
00375                         cache_addb(0xdd);
00376                         cache_addb(0x05|(decode.modrm.reg<<3));
00377                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00378                         gen_call_function((void*)&FPU_FST_16,"%Ddr",DREG(EA));
00379                         break;
00380                 default:
00381                         LOG(LOG_FPU,LOG_WARN)("ESC 5 EA:Unhandled group %d subfunction %d",group,sub);
00382                 }
00383         }
00384 }
00385 
00386 static void dh_fpu_esc6(){
00387         dyn_get_modrm();  
00388         if (decode.modrm.val >= 0xc0) { 
00389                 cache_addb(0xde);
00390                 cache_addb(decode.modrm.val);
00391         } else {
00392                 dyn_fill_ea(); 
00393                 gen_call_function((void*)&FPU_FLD_16,"%Ddr",DREG(EA)); 
00394                 cache_addb(0xde);
00395                 cache_addb(0x05|(decode.modrm.reg<<3));
00396                 cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00397         }
00398 }
00399 
00400 static void dh_fpu_esc7(){
00401         dyn_get_modrm();  
00402         Bitu group=(decode.modrm.val >> 3) & 7;
00403         Bitu sub=(decode.modrm.val & 7);
00404         if (decode.modrm.val >= 0xc0) { 
00405                 switch (group){
00406                 case 0x00: /* FFREEP STi*/
00407                         cache_addb(0xdf);
00408                         cache_addb(decode.modrm.val);
00409                         break;
00410                 case 0x01: /* FXCH STi*/
00411                         cache_addb(0xdf);
00412                         cache_addb(decode.modrm.val);
00413                         break;
00414                 case 0x02:  /* FSTP STi*/
00415                 case 0x03:  /* FSTP STi*/
00416                         cache_addb(0xdf);
00417                         cache_addb(decode.modrm.val);
00418                         break;
00419                 case 0x04:
00420                         switch(sub){
00421                                 case 0x00:     /* FNSTSW AX*/
00422                                         cache_addb(0xdd);
00423                                         cache_addb(0x05|(0x07<<3));
00424                                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00425                                         gen_load_host(&(dyn_dh_fpu.temp.m1),DREG(TMPB),4);
00426                                         gen_dop_word(DOP_MOV,false,DREG(EAX),DREG(TMPB));
00427                                         gen_releasereg(DREG(TMPB));
00428                                         break;
00429                                 default:
00430                                         LOG(LOG_FPU,LOG_WARN)("ESC 7:Unhandled group %d subfunction %d",group,sub);
00431                                         break;
00432                         }
00433                         break;
00434                 default:
00435                         LOG(LOG_FPU,LOG_WARN)("ESC 7:Unhandled group %d subfunction %d",group,sub);
00436                         break;
00437                 }
00438         } else {
00439                 dyn_fill_ea(); 
00440                 switch(group){
00441                 case 0x00:  /* FILD Bit16s */
00442                         gen_call_function((void*)&FPU_FLD_16,"%Ddr",DREG(EA));
00443                         cache_addb(0xdf);
00444                         cache_addb(0x05|(decode.modrm.reg<<3));
00445                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00446                         break;
00447                 case 0x01:
00448                         LOG(LOG_FPU,LOG_WARN)("ESC 7 EA:Unhandled group %d subfunction %d",group,sub);
00449                         break;
00450                 case 0x02:   /* FIST Bit16s */
00451                         cache_addb(0xdf);
00452                         cache_addb(0x05|(decode.modrm.reg<<3));
00453                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00454                         gen_call_function((void*)&FPU_FST_16,"%Ddr",DREG(EA));
00455                         break;
00456                 case 0x03:      /* FISTP Bit16s */
00457                         cache_addb(0xdf);
00458                         cache_addb(0x05|(decode.modrm.reg<<3));
00459                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00460                         gen_call_function((void*)&FPU_FST_16,"%Ddr",DREG(EA));
00461                         break;
00462                 case 0x04:   /* FBLD packed BCD */
00463                         gen_call_function((void*)&FPU_FLD_80,"%Ddr",DREG(EA));
00464                         cache_addb(0xdf);
00465                         cache_addb(0x05|(decode.modrm.reg<<3));
00466                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00467                         break;
00468                 case 0x05:  /* FILD Bit64s */
00469                         gen_call_function((void*)&FPU_FLD_64,"%Ddr",DREG(EA));
00470                         cache_addb(0xdf);
00471                         cache_addb(0x05|(decode.modrm.reg<<3));
00472                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00473                         break;
00474                 case 0x06:      /* FBSTP packed BCD */
00475                         cache_addb(0xdf);
00476                         cache_addb(0x05|(decode.modrm.reg<<3));
00477                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00478                         gen_call_function((void*)&FPU_FST_80,"%Ddr",DREG(EA));
00479                         break;
00480                 case 0x07:  /* FISTP Bit64s */
00481                         cache_addb(0xdf);
00482                         cache_addb(0x05|(decode.modrm.reg<<3));
00483                         cache_addd((uintptr_t)(&(dyn_dh_fpu.temp.m1)));
00484                         gen_call_function((void*)&FPU_FST_64,"%Ddr",DREG(EA));
00485                         break;
00486                 default:
00487                         LOG(LOG_FPU,LOG_WARN)("ESC 7 EA:Unhandled group %d subfunction %d",group,sub);
00488                         break;
00489                 }
00490         }
00491 }
00492 
00493 #endif