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src/fpu/fpu_instructions.h
00001 /*
00002  *  Copyright (C) 2002-2013  The DOSBox Team
00003  *
00004  *  This program is free software; you can redistribute it and/or modify
00005  *  it under the terms of the GNU General Public License as published by
00006  *  the Free Software Foundation; either version 2 of the License, or
00007  *  (at your option) any later version.
00008  *
00009  *  This program is distributed in the hope that it will be useful,
00010  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
00011  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012  *  GNU General Public License for more details.
00013  *
00014  *  You should have received a copy of the GNU General Public License
00015  *  along with this program; if not, write to the Free Software
00016  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
00017  */
00018 
00019 #include <math.h> /* for isinf, etc */
00020 #include "cpu/lazyflags.h"
00021 static void FPU_FINIT(void) {
00022         unsigned int i;
00023 
00024         FPU_SetCW(0x37F);
00025         fpu.sw = 0;
00026         TOP=FPU_GET_TOP();
00027         fpu.tags[0] = TAG_Empty;
00028         fpu.tags[1] = TAG_Empty;
00029         fpu.tags[2] = TAG_Empty;
00030         fpu.tags[3] = TAG_Empty;
00031         fpu.tags[4] = TAG_Empty;
00032         fpu.tags[5] = TAG_Empty;
00033         fpu.tags[6] = TAG_Empty;
00034         fpu.tags[7] = TAG_Empty;
00035         fpu.tags[8] = TAG_Valid; // is only used by us (FIXME: why?)
00036         for (i=0;i < 9;i++) fpu.use80[i] = false;
00037 }
00038 
00039 static void FPU_FCLEX(void){
00040         fpu.sw &= 0x7f00;                       //should clear exceptions
00041 }
00042 
00043 static void FPU_FNOP(void){
00044         return;
00045 }
00046 
00047 static void FPU_PUSH(double in){
00048         TOP = (TOP - 1) &7;
00049         //actually check if empty
00050         fpu.tags[TOP] = TAG_Valid;
00051         fpu.regs[TOP].d = in;
00052         fpu.use80[TOP] = false; // the value given is already 64-bit precision, it's useless to emulate 80-bit precision
00053 //      LOG(LOG_FPU,LOG_ERROR)("Pushed at %d  %g to the stack",newtop,in);
00054         return;
00055 }
00056 
00057 static void FPU_PREP_PUSH(void){
00058         TOP = (TOP - 1) &7;
00059         fpu.tags[TOP] = TAG_Valid;
00060         fpu.use80[TOP] = false; // the value given is already 64-bit precision, it's useless to emulate 80-bit precision
00061 }
00062 
00063 static void FPU_FPOP(void){
00064         fpu.tags[TOP]=TAG_Empty;
00065         fpu.use80[TOP] = false; // the value given is already 64-bit precision, it's useless to emulate 80-bit precision
00066         //maybe set zero in it as well
00067         TOP = ((TOP+1)&7);
00068 //      LOG(LOG_FPU,LOG_ERROR)("popped from %d  %g off the stack",top,fpu.regs[top].d);
00069         return;
00070 }
00071 
00072 static double FROUND(double in){
00073         switch(fpu.round){
00074         case ROUND_Nearest:     
00075                 if (in-floor(in)>0.5) return (floor(in)+1);
00076                 else if (in-floor(in)<0.5) return (floor(in));
00077                 else return (((static_cast<Bit64s>(floor(in)))&1)!=0)?(floor(in)+1):(floor(in));
00078                 break;
00079         case ROUND_Down:
00080                 return (floor(in));
00081                 break;
00082         case ROUND_Up:
00083                 return (ceil(in));
00084                 break;
00085         case ROUND_Chop:
00086                 return in; //the cast afterwards will do it right maybe cast here
00087                 break;
00088         default:
00089                 return in;
00090                 break;
00091         }
00092 }
00093 
00094 #define BIAS80 16383
00095 #define BIAS64 1023
00096 
00097 static Real64 FPU_FLD80(PhysPt addr,FPU_Reg_80 &raw) {
00098         struct {
00099                 Bit16s begin;
00100                 FPU_Reg eind;
00101         } test;
00102         test.eind.l.lower = mem_readd(addr);
00103         test.eind.l.upper = (Bit32s)mem_readd(addr+4);
00104         test.begin = (Bit16s)mem_readw(addr+8);
00105    
00106         Bit64s exp64 = (((test.begin&0x7fff) - BIAS80));
00107         Bit64s blah = ((exp64 >0)?exp64:-exp64)&0x3ff;
00108         Bit64s exp64final = ((exp64 >0)?blah:-blah) +BIAS64;
00109 
00110         Bit64s mant64 = (test.eind.ll >> 11) & LONGTYPE(0xfffffffffffff);
00111         Bit64s sign = (test.begin&0x8000)?1:0;
00112         FPU_Reg result;
00113         result.ll = (sign <<63)|(exp64final << 52)| mant64;
00114 
00115         if(test.eind.l.lower == 0 && (Bit32u)test.eind.l.upper == (Bit32u)0x80000000UL && (test.begin&0x7fff) == 0x7fff) {
00116                 //Detect INF and -INF (score 3.11 when drawing a slur.)
00117                 result.d = sign?-HUGE_VAL:HUGE_VAL;
00118         }
00119 
00120         /* store the raw value. */
00121         raw.raw.l = (Bit64u)test.eind.ll;
00122         raw.raw.h = (Bit16u)test.begin;
00123 
00124         return result.d;
00125 
00126         //mant64= test.mant80/2***64    * 2 **53 
00127 }
00128 
00129 static void FPU_ST80(PhysPt addr,Bitu reg,FPU_Reg_80 &raw,bool use80) {
00130         if (use80) {
00131                 // we have the raw 80-bit IEEE float value. we can just store
00132                 mem_writed(addr,(Bit32u)raw.raw.l);
00133                 mem_writed(addr+4,(Bit32u)(raw.raw.l >> (Bit64u)32));
00134                 mem_writew(addr+8,(Bit16u)raw.raw.h);
00135         }
00136         else {
00137                 // convert the "double" type to 80-bit IEEE and store
00138                 struct {
00139                         Bit16s begin;
00140                         FPU_Reg eind;
00141                 } test;
00142                 Bit64s sign80 = ((Bit64u)fpu.regs[reg].ll&ULONGTYPE(0x8000000000000000))?1:0;
00143                 Bit64s exp80 =  fpu.regs[reg].ll&LONGTYPE(0x7ff0000000000000);
00144                 Bit64s exp80final = (exp80>>52);
00145                 Bit64s mant80 = fpu.regs[reg].ll&LONGTYPE(0x000fffffffffffff);
00146                 Bit64s mant80final = (mant80 << 11);
00147                 if(fpu.regs[reg].d != 0){ //Zero is a special case
00148                         // Elvira wants the 8 and tcalc doesn't
00149                         mant80final |= (Bit64s)ULONGTYPE(0x8000000000000000);
00150                         //Ca-cyber doesn't like this when result is zero.
00151                         exp80final += (BIAS80 - BIAS64);
00152                 }
00153                 test.begin = (static_cast<Bit16s>(sign80)<<15)| static_cast<Bit16s>(exp80final);
00154                 test.eind.ll = mant80final;
00155                 mem_writed(addr,test.eind.l.lower);
00156                 mem_writed(addr+4,(uint32_t)test.eind.l.upper);
00157                 mem_writew(addr+8,(uint16_t)test.begin);
00158         }
00159 }
00160 
00161 
00162 static void FPU_FLD_F32(PhysPt addr,Bitu store_to) {
00163         union {
00164                 float f;
00165                 Bit32u l;
00166         }       blah;
00167         blah.l = mem_readd(addr);
00168         fpu.regs[store_to].d = static_cast<Real64>(blah.f);
00169         fpu.use80[store_to] = false;
00170 }
00171 
00172 static void FPU_FLD_F64(PhysPt addr,Bitu store_to) {
00173         fpu.regs[store_to].l.lower = mem_readd(addr);
00174         fpu.regs[store_to].l.upper = (Bit32s)mem_readd(addr+4);
00175         fpu.use80[store_to] = false;
00176 }
00177 
00178 static void FPU_FLD_F80(PhysPt addr) {
00179         fpu.regs[TOP].d = FPU_FLD80(addr,/*&*/fpu.regs_80[TOP]);
00180         fpu.use80[TOP] = true;
00181 }
00182 
00183 static void FPU_FLD_I16(PhysPt addr,Bitu store_to) {
00184         Bit16s blah = (Bit16s)mem_readw(addr);
00185         fpu.regs[store_to].d = static_cast<Real64>(blah);
00186         fpu.use80[store_to] = false;
00187 }
00188 
00189 static void FPU_FLD_I32(PhysPt addr,Bitu store_to) {
00190         Bit32s blah = (Bit32s)mem_readd(addr);
00191         fpu.regs[store_to].d = static_cast<Real64>(blah);
00192         fpu.use80[store_to] = false;
00193 }
00194 
00195 static void FPU_FLD_I64(PhysPt addr,Bitu store_to) {
00196         FPU_Reg blah;
00197         blah.l.lower = mem_readd(addr);
00198         blah.l.upper = (Bit32s)mem_readd(addr+4);
00199         fpu.regs[store_to].d = static_cast<Real64>(blah.ll);
00200         // store the signed 64-bit integer in the 80-bit format mantissa with faked exponent.
00201         // this is needed for DOS and Windows games that use the Pentium fast memcpy trick, using FLD/FST to copy 64 bits at a time.
00202         // I wonder if that trick is what helped spur Intel to make the MMX extensions :)
00203         fpu.regs_80[store_to].raw.l = (Bit64u)blah.ll;
00204         fpu.regs_80[store_to].raw.h = ((blah.ll/*sign bit*/ >> (Bit64u)63) ? 0x8000u : 0x0000u) + FPU_Reg_80_exponent_bias + 63u; // FIXME: Verify this is correct!
00205         fpu.use80[store_to] = true;
00206 }
00207 
00208 static void FPU_FBLD(PhysPt addr,Bitu store_to) {
00209         Bit64u val = 0;
00210         Bitu in = 0;
00211         Bit64u base = 1;
00212         for(Bitu i = 0;i < 9;i++){
00213                 in = mem_readb(addr + i);
00214                 val += ( (in&0xf) * base); //in&0xf shouldn't be higher then 9
00215                 base *= 10;
00216                 val += ((( in>>4)&0xf) * base);
00217                 base *= 10;
00218         }
00219 
00220         //last number, only now convert to float in order to get
00221         //the best signification
00222         Real64 temp = static_cast<Real64>(val);
00223         in = mem_readb(addr + 9);
00224         temp += ( (in&0xf) * base );
00225         if(in&0x80) temp *= -1.0;
00226         fpu.regs[store_to].d = temp;
00227         fpu.use80[store_to] = false;
00228 }
00229 
00230 
00231 static INLINE void FPU_FLD_F32_EA(PhysPt addr) {
00232         FPU_FLD_F32(addr,8);
00233 }
00234 static INLINE void FPU_FLD_F64_EA(PhysPt addr) {
00235         FPU_FLD_F64(addr,8);
00236 }
00237 static INLINE void FPU_FLD_I32_EA(PhysPt addr) {
00238         FPU_FLD_I32(addr,8);
00239 }
00240 static INLINE void FPU_FLD_I16_EA(PhysPt addr) {
00241         FPU_FLD_I16(addr,8);
00242 }
00243 
00244 
00245 static void FPU_FST_F32(PhysPt addr) {
00246         union {
00247                 float f;
00248                 Bit32u l;
00249         }       blah;
00250         //should depend on rounding method
00251         blah.f = static_cast<float>(fpu.regs[TOP].d);
00252         mem_writed(addr,blah.l);
00253 }
00254 
00255 static void FPU_FST_F64(PhysPt addr) {
00256         mem_writed(addr,(uint32_t)fpu.regs[TOP].l.lower);
00257         mem_writed(addr+4,(uint32_t)fpu.regs[TOP].l.upper);
00258 }
00259 
00260 static void FPU_FST_F80(PhysPt addr) {
00261         FPU_ST80(addr,TOP,/*&*/fpu.regs_80[TOP],fpu.use80[TOP]);
00262 }
00263 
00264 static void FPU_FST_I16(PhysPt addr) {
00265         mem_writew(addr,(uint16_t)static_cast<Bit16s>(FROUND(fpu.regs[TOP].d)));
00266 }
00267 
00268 static void FPU_FST_I32(PhysPt addr) {
00269         mem_writed(addr,(uint32_t)static_cast<Bit32s>(FROUND(fpu.regs[TOP].d)));
00270 }
00271 
00272 static void FPU_FST_I64(PhysPt addr) {
00273         FPU_Reg blah;
00274         if (fpu.use80[TOP] && (fpu.regs_80[TOP].raw.h & 0x7FFFu) == (0x0000u + FPU_Reg_80_exponent_bias + 63u)) {
00275                 // FIXME: This works so far for DOS demos that use the "Pentium memcpy trick" to copy 64 bits at a time.
00276                 //        What this code needs to do is take the exponent into account and then clamp the 64-bit int within range.
00277                 //        This cheap hack is good enough for now.
00278                 mem_writed(addr,(Bit32u)(fpu.regs_80[TOP].raw.l));
00279                 mem_writed(addr+4,(Bit32u)(fpu.regs_80[TOP].raw.l >> (Bit64u)32));
00280         }
00281         else {
00282                 blah.ll = static_cast<Bit64s>(FROUND(fpu.regs[TOP].d));
00283                 mem_writed(addr,(uint32_t)blah.l.lower);
00284                 mem_writed(addr+4,(uint32_t)blah.l.upper);
00285         }
00286 }
00287 
00288 static void FPU_FBST(PhysPt addr) {
00289         FPU_Reg val = fpu.regs[TOP];
00290         bool sign = false;
00291         if((Bit64u)fpu.regs[TOP].ll & ULONGTYPE(0x8000000000000000)) { //sign
00292                 sign=true;
00293                 val.d=-val.d;
00294         }
00295         //numbers from back to front
00296         Real64 temp=val.d;
00297         Bitu p;
00298         for(Bitu i=0;i<9;i++){
00299                 val.d=temp;
00300                 temp = static_cast<Real64>(static_cast<Bit64s>(floor(val.d/10.0)));
00301                 p = static_cast<Bitu>(val.d - 10.0*temp);  
00302                 val.d=temp;
00303                 temp = static_cast<Real64>(static_cast<Bit64s>(floor(val.d/10.0)));
00304                 p |= (static_cast<Bitu>(val.d - 10.0*temp)<<4);
00305 
00306                 mem_writeb(addr+i,p);
00307         }
00308         val.d=temp;
00309         temp = static_cast<Real64>(static_cast<Bit64s>(floor(val.d/10.0)));
00310         p = static_cast<Bitu>(val.d - 10.0*temp);
00311         if(sign)
00312                 p|=0x80;
00313         mem_writeb(addr+9,p);
00314 }
00315 
00316 #if defined(WIN32) && defined(_MSC_VER) && (_MSC_VER < 1910)
00317 /* std::isinf is C99 standard how could you NOT have this VS2008??? */
00318 # include <math.h>
00319 /* the purpose of this macro is to test for -/+inf. NaN is not inf. If finite or NaN it's not infinity */
00320 # define isinf(x) (!(_finite(x) || _isnan(x)))
00321 # define isdenormal(x) (_fpclass(x) == _FPCLASS_ND || _fpclass(x) == _FPCLASS_PD)
00322 #else
00323 # include <math.h>
00324 # include <cmath>
00325 # define isdenormal(x) (!std::isnormal(x))
00326 #endif
00327 
00328 static void FPU_FADD(Bitu op1, Bitu op2){
00329         // HACK: Set the denormal flag according to whether the source or final result is a denormalized number.
00330         //       This is vital if we don't want certain DOS programs to mis-detect our FPU emulation as an IIT clone chip when cputype == 286
00331         bool was_not_normal = isdenormal(fpu.regs[op1].d);
00332         fpu.regs[op1].d+=fpu.regs[op2].d;
00333         FPU_SET_D(was_not_normal || isdenormal(fpu.regs[op1].d) || isdenormal(fpu.regs[op2].d));
00334         fpu.use80[op1] = false; // we used the less precise version, drop the 80-bit precision
00335         //flags and such :)
00336         return;
00337 }
00338 
00339 static void FPU_FSIN(void){
00340         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00341         fpu.regs[TOP].d = sin(fpu.regs[TOP].d);
00342         FPU_SET_C2(0);
00343         //flags and such :)
00344         return;
00345 }
00346 
00347 static void FPU_FSINCOS(void){
00348         Real64 temp = fpu.regs[TOP].d;
00349         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00350         fpu.regs[TOP].d = sin(temp);
00351         FPU_PUSH(cos(temp));
00352         FPU_SET_C2(0);
00353         //flags and such :)
00354         return;
00355 }
00356 
00357 static void FPU_FCOS(void){
00358         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00359         fpu.regs[TOP].d = cos(fpu.regs[TOP].d);
00360         FPU_SET_C2(0);
00361         //flags and such :)
00362         return;
00363 }
00364 
00365 static void FPU_FSQRT(void){
00366         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00367         fpu.regs[TOP].d = sqrt(fpu.regs[TOP].d);
00368         //flags and such :)
00369         return;
00370 }
00371 static void FPU_FPATAN(void){
00372         fpu.use80[STV(1)] = false; // we used the less precise version, drop the 80-bit precision
00373         fpu.regs[STV(1)].d = atan2(fpu.regs[STV(1)].d,fpu.regs[TOP].d);
00374         FPU_FPOP();
00375         //flags and such :)
00376         return;
00377 }
00378 static void FPU_FPTAN(void){
00379         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00380         fpu.regs[TOP].d = tan(fpu.regs[TOP].d);
00381         FPU_PUSH(1.0);
00382         FPU_SET_C2(0);
00383         //flags and such :)
00384         return;
00385 }
00386 static void FPU_FDIV(Bitu st, Bitu other){
00387         fpu.use80[st] = false; // we used the less precise version, drop the 80-bit precision
00388         fpu.regs[st].d= fpu.regs[st].d/fpu.regs[other].d;
00389         //flags and such :)
00390         return;
00391 }
00392 
00393 static void FPU_FDIVR(Bitu st, Bitu other){
00394         fpu.use80[st] = false; // we used the less precise version, drop the 80-bit precision
00395         fpu.regs[st].d= fpu.regs[other].d/fpu.regs[st].d;
00396         // flags and such :)
00397         return;
00398 }
00399 
00400 static void FPU_FMUL(Bitu st, Bitu other){
00401         fpu.use80[st] = false; // we used the less precise version, drop the 80-bit precision
00402         fpu.regs[st].d*=fpu.regs[other].d;
00403         //flags and such :)
00404         return;
00405 }
00406 
00407 static void FPU_FSUB(Bitu st, Bitu other){
00408         fpu.use80[st] = false; // we used the less precise version, drop the 80-bit precision
00409         fpu.regs[st].d = fpu.regs[st].d - fpu.regs[other].d;
00410         //flags and such :)
00411         return;
00412 }
00413 
00414 static void FPU_FSUBR(Bitu st, Bitu other){
00415         fpu.use80[st] = false; // we used the less precise version, drop the 80-bit precision
00416         fpu.regs[st].d= fpu.regs[other].d - fpu.regs[st].d;
00417         //flags and such :)
00418         return;
00419 }
00420 
00421 static void FPU_FXCH(Bitu st, Bitu other){
00422         FPU_Reg_80 reg80 = fpu.regs_80[other];
00423         FPU_Tag tag = fpu.tags[other];
00424         FPU_Reg reg = fpu.regs[other];
00425         bool use80 = fpu.use80[other];
00426 
00427         fpu.regs_80[other] = fpu.regs_80[st];
00428         fpu.use80[other] = fpu.use80[st];
00429         fpu.tags[other] = fpu.tags[st];
00430         fpu.regs[other] = fpu.regs[st];
00431 
00432         fpu.regs_80[st] = reg80;
00433         fpu.use80[st] = use80;
00434         fpu.tags[st] = tag;
00435         fpu.regs[st] = reg;
00436 }
00437 
00438 static void FPU_FST(Bitu st, Bitu other){
00439         fpu.regs_80[other] = fpu.regs_80[st];
00440         fpu.use80[other] = fpu.use80[st];
00441         fpu.tags[other] = fpu.tags[st];
00442         fpu.regs[other] = fpu.regs[st];
00443 }
00444 
00445 static inline void FPU_FCMOV(Bitu st, Bitu other){
00446         fpu.regs_80[st] = fpu.regs_80[other];
00447         fpu.use80[st] = fpu.use80[other];
00448         fpu.tags[st] = fpu.tags[other];
00449         fpu.regs[st] = fpu.regs[other];
00450 }
00451 
00452 static void FPU_FCOM(Bitu st, Bitu other){
00453         if(((fpu.tags[st] != TAG_Valid) && (fpu.tags[st] != TAG_Zero)) || 
00454                 ((fpu.tags[other] != TAG_Valid) && (fpu.tags[other] != TAG_Zero))){
00455                 FPU_SET_C3(1);FPU_SET_C2(1);FPU_SET_C0(1);return;
00456         }
00457 
00458         /* HACK: If emulating a 286 processor we want the guest to think it's talking to a 287.
00459          *       For more info, read [http://www.intel-assembler.it/portale/5/cpu-identification/asm-source-to-find-intel-cpu.asp]. */
00460         /* TODO: This should eventually become an option, say, a dosbox.conf option named fputype where the user can enter
00461          *       "none" for no FPU, 287 or 387 for cputype=286 and cputype=386, or "auto" to match the CPU (8086 => 8087).
00462          *       If the FPU type is 387 or auto, then skip this hack. Else for 8087 and 287, use this hack. */
00463         if (CPU_ArchitectureType<CPU_ARCHTYPE_386) {
00464                 if ((std::isinf)(fpu.regs[st].d) && (std::isinf)(fpu.regs[other].d)) {
00465                         /* 8087/287 consider -inf == +inf and that's what DOS programs test for to detect 287 vs 387 */
00466                         FPU_SET_C3(1);FPU_SET_C2(0);FPU_SET_C0(0);return;
00467                 }
00468         }
00469 
00470         if(fpu.regs[st].d == fpu.regs[other].d){
00471                 FPU_SET_C3(1);FPU_SET_C2(0);FPU_SET_C0(0);return;
00472         }
00473         if(fpu.regs[st].d < fpu.regs[other].d){
00474                 FPU_SET_C3(0);FPU_SET_C2(0);FPU_SET_C0(1);return;
00475         }
00476         // st > other
00477         FPU_SET_C3(0);FPU_SET_C2(0);FPU_SET_C0(0);return;
00478 }
00479 
00480 static void FPU_FUCOM(Bitu st, Bitu other){
00481         //does atm the same as fcom 
00482         FPU_FCOM(st,other);
00483 }
00484 
00485 static void FPU_FUCOMI(Bitu st, Bitu other){
00486         
00487         FillFlags();
00488         SETFLAGBIT(OF,false);
00489 
00490         if(fpu.regs[st].d == fpu.regs[other].d){
00491                 SETFLAGBIT(ZF,true);SETFLAGBIT(PF,false);SETFLAGBIT(CF,false);return;
00492         }
00493         if(fpu.regs[st].d < fpu.regs[other].d){
00494                 SETFLAGBIT(ZF,false);SETFLAGBIT(PF,false);SETFLAGBIT(CF,true);return;
00495         }
00496         // st > other
00497         SETFLAGBIT(ZF,false);SETFLAGBIT(PF,false);SETFLAGBIT(CF,false);return;
00498 }
00499 
00500 static inline void FPU_FCOMI(Bitu st, Bitu other){
00501         FPU_FUCOMI(st,other);
00502 
00503         if(((fpu.tags[st] != TAG_Valid) && (fpu.tags[st] != TAG_Zero)) || 
00504                 ((fpu.tags[other] != TAG_Valid) && (fpu.tags[other] != TAG_Zero))){
00505                 SETFLAGBIT(ZF,true);SETFLAGBIT(PF,true);SETFLAGBIT(CF,true);return;
00506         }
00507 
00508 }
00509 
00510 static void FPU_FRNDINT(void){
00511         Bit64s temp= static_cast<Bit64s>(FROUND(fpu.regs[TOP].d));
00512         fpu.regs[TOP].d=static_cast<double>(temp);
00513         fpu.use80[TOP] = false;
00514 }
00515 
00516 static void FPU_FPREM(void){
00517         Real64 valtop = fpu.regs[TOP].d;
00518         Real64 valdiv = fpu.regs[STV(1)].d;
00519         Bit64s ressaved = static_cast<Bit64s>( (valtop/valdiv) );
00520 // Some backups
00521 //      Real64 res=valtop - ressaved*valdiv; 
00522 //      res= fmod(valtop,valdiv);
00523         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00524         fpu.regs[TOP].d = valtop - ressaved*valdiv;
00525         FPU_SET_C0(static_cast<Bitu>(ressaved&4));
00526         FPU_SET_C3(static_cast<Bitu>(ressaved&2));
00527         FPU_SET_C1(static_cast<Bitu>(ressaved&1));
00528         FPU_SET_C2(0);
00529 }
00530 
00531 static void FPU_FPREM1(void){
00532         Real64 valtop = fpu.regs[TOP].d;
00533         Real64 valdiv = fpu.regs[STV(1)].d;
00534         double quot = valtop/valdiv;
00535         double quotf = floor(quot);
00536         Bit64s ressaved;
00537         if (quot-quotf>0.5) ressaved = static_cast<Bit64s>(quotf+1);
00538         else if (quot-quotf<0.5) ressaved = static_cast<Bit64s>(quotf);
00539         else ressaved = static_cast<Bit64s>((((static_cast<Bit64s>(quotf))&1)!=0)?(quotf+1):(quotf));
00540         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00541         fpu.regs[TOP].d = valtop - ressaved*valdiv;
00542         FPU_SET_C0(static_cast<Bitu>(ressaved&4));
00543         FPU_SET_C3(static_cast<Bitu>(ressaved&2));
00544         FPU_SET_C1(static_cast<Bitu>(ressaved&1));
00545         FPU_SET_C2(0);
00546 }
00547 
00548 static void FPU_FXAM(void){
00549         if((Bit64u)fpu.regs[TOP].ll & ULONGTYPE(0x8000000000000000))    //sign
00550         { 
00551                 FPU_SET_C1(1);
00552         } 
00553         else 
00554         {
00555                 FPU_SET_C1(0);
00556         }
00557         if(fpu.tags[TOP] == TAG_Empty)
00558         {
00559                 FPU_SET_C3(1);FPU_SET_C2(0);FPU_SET_C0(1);
00560                 return;
00561         }
00562         if(fpu.regs[TOP].d == 0.0)              //zero or normalized number.
00563         { 
00564                 FPU_SET_C3(1);FPU_SET_C2(0);FPU_SET_C0(0);
00565         }
00566         else
00567         {
00568                 FPU_SET_C3(0);FPU_SET_C2(1);FPU_SET_C0(0);
00569         }
00570 }
00571 
00572 
00573 static void FPU_F2XM1(void){
00574         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00575         fpu.regs[TOP].d = pow(2.0,fpu.regs[TOP].d) - 1;
00576         return;
00577 }
00578 
00579 static void FPU_FYL2X(void){
00580         fpu.use80[STV(1)] = false; // we used the less precise version, drop the 80-bit precision
00581         fpu.regs[STV(1)].d*=log(fpu.regs[TOP].d)/log(static_cast<Real64>(2.0));
00582         FPU_FPOP();
00583         return;
00584 }
00585 
00586 static void FPU_FYL2XP1(void){
00587         fpu.use80[STV(1)] = false; // we used the less precise version, drop the 80-bit precision
00588         fpu.regs[STV(1)].d*=log(fpu.regs[TOP].d+1.0)/log(static_cast<Real64>(2.0));
00589         FPU_FPOP();
00590         return;
00591 }
00592 
00593 static void FPU_FSCALE(void){
00594         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00595         fpu.regs[TOP].d *= pow(2.0,static_cast<Real64>(static_cast<Bit64s>(fpu.regs[STV(1)].d)));
00596         return; //2^x where x is chopped.
00597 }
00598 
00599 static void FPU_FSTENV(PhysPt addr){
00600         FPU_SET_TOP(TOP);
00601         if(!cpu.code.big) {
00602                 mem_writew(addr+0,static_cast<Bit16u>(fpu.cw));
00603                 mem_writew(addr+2,static_cast<Bit16u>(fpu.sw));
00604                 mem_writew(addr+4,static_cast<Bit16u>(FPU_GetTag()));
00605         } else { 
00606                 mem_writed(addr+0,static_cast<Bit32u>(fpu.cw));
00607                 mem_writed(addr+4,static_cast<Bit32u>(fpu.sw));
00608                 mem_writed(addr+8,static_cast<Bit32u>(FPU_GetTag()));
00609         }
00610 }
00611 
00612 static void FPU_FLDENV(PhysPt addr){
00613         Bit16u tag;
00614         Bit32u tagbig;
00615         Bitu cw;
00616         if(!cpu.code.big) {
00617                 cw     = mem_readw(addr+0);
00618                 fpu.sw = mem_readw(addr+2);
00619                 tag    = mem_readw(addr+4);
00620         } else { 
00621                 cw     = mem_readd(addr+0);
00622                 fpu.sw = (Bit16u)mem_readd(addr+4);
00623                 tagbig = mem_readd(addr+8);
00624                 tag    = static_cast<Bit16u>(tagbig);
00625         }
00626         FPU_SetTag(tag);
00627         FPU_SetCW(cw);
00628         TOP = FPU_GET_TOP();
00629 }
00630 
00631 static void FPU_FSAVE(PhysPt addr){
00632         FPU_FSTENV(addr);
00633         Bitu start = (cpu.code.big?28:14);
00634         for(Bitu i = 0;i < 8;i++){
00635                 FPU_ST80(addr+start,STV(i),/*&*/fpu.regs_80[STV(i)],fpu.use80[STV(i)]);
00636                 start += 10;
00637         }
00638         FPU_FINIT();
00639 }
00640 
00641 static void FPU_FRSTOR(PhysPt addr){
00642         FPU_FLDENV(addr);
00643         Bitu start = (cpu.code.big?28:14);
00644         for(Bitu i = 0;i < 8;i++){
00645                 fpu.regs[STV(i)].d = FPU_FLD80(addr+start,/*&*/fpu.regs_80[STV(i)]);
00646                 fpu.use80[STV(i)] = true;
00647                 start += 10;
00648         }
00649 }
00650 
00651 static void FPU_FXTRACT(void) {
00652         // function stores real bias in st and 
00653         // pushes the significant number onto the stack
00654         // if double ever uses a different base please correct this function
00655 
00656         FPU_Reg test = fpu.regs[TOP];
00657         Bit64s exp80 =  test.ll&LONGTYPE(0x7ff0000000000000);
00658         Bit64s exp80final = (exp80>>52) - BIAS64;
00659         Real64 mant = test.d / (pow(2.0,static_cast<Real64>(exp80final)));
00660         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00661         fpu.regs[TOP].d = static_cast<Real64>(exp80final);
00662         FPU_PUSH(mant);
00663 }
00664 
00665 static void FPU_FCHS(void){
00666         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00667         fpu.regs[TOP].d = -1.0*(fpu.regs[TOP].d);
00668 }
00669 
00670 static void FPU_FABS(void){
00671         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00672         fpu.regs[TOP].d = fabs(fpu.regs[TOP].d);
00673 }
00674 
00675 static void FPU_FTST(void){
00676         fpu.use80[8] = false; // we used the less precise version, drop the 80-bit precision
00677         fpu.regs[8].d = 0.0;
00678         FPU_FCOM(TOP,8);
00679 }
00680 
00681 static void FPU_FLD1(void){
00682         FPU_PREP_PUSH();
00683         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00684         fpu.regs[TOP].d = 1.0;
00685 }
00686 
00687 static void FPU_FLDL2T(void){
00688         FPU_PREP_PUSH();
00689         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00690         fpu.regs[TOP].d = L2T;
00691 }
00692 
00693 static void FPU_FLDL2E(void){
00694         FPU_PREP_PUSH();
00695         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00696         fpu.regs[TOP].d = L2E;
00697 }
00698 
00699 static void FPU_FLDPI(void){
00700         FPU_PREP_PUSH();
00701         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00702         fpu.regs[TOP].d = PI;
00703 }
00704 
00705 static void FPU_FLDLG2(void){
00706         FPU_PREP_PUSH();
00707         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00708         fpu.regs[TOP].d = LG2;
00709 }
00710 
00711 static void FPU_FLDLN2(void){
00712         FPU_PREP_PUSH();
00713         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00714         fpu.regs[TOP].d = LN2;
00715 }
00716 
00717 static void FPU_FLDZ(void){
00718         FPU_PREP_PUSH();
00719         fpu.use80[TOP] = false; // we used the less precise version, drop the 80-bit precision
00720         fpu.regs[TOP].d = 0.0;
00721         fpu.tags[TOP] = TAG_Zero;
00722 }
00723 
00724 
00725 static INLINE void FPU_FADD_EA(Bitu op1){
00726         FPU_FADD(op1,8);
00727 }
00728 static INLINE void FPU_FMUL_EA(Bitu op1){
00729         FPU_FMUL(op1,8);
00730 }
00731 static INLINE void FPU_FSUB_EA(Bitu op1){
00732         FPU_FSUB(op1,8);
00733 }
00734 static INLINE void FPU_FSUBR_EA(Bitu op1){
00735         FPU_FSUBR(op1,8);
00736 }
00737 static INLINE void FPU_FDIV_EA(Bitu op1){
00738         FPU_FDIV(op1,8);
00739 }
00740 static INLINE void FPU_FDIVR_EA(Bitu op1){
00741         FPU_FDIVR(op1,8);
00742 }
00743 static INLINE void FPU_FCOM_EA(Bitu op1){
00744         FPU_FCOM(op1,8);
00745 }
00746