|
DOSBox-X
|
|
DOSBox-X
|
00001 /* 00002 * Copyright (C) 2002-2020 The DOSBox Team 00003 * 00004 * This program is free software; you can redistribute it and/or modify 00005 * it under the terms of the GNU General Public License as published by 00006 * the Free Software Foundation; either version 2 of the License, or 00007 * (at your option) any later version. 00008 * 00009 * This program is distributed in the hope that it will be useful, 00010 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00011 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00012 * GNU General Public License for more details. 00013 * 00014 * You should have received a copy of the GNU General Public License along 00015 * with this program; if not, write to the Free Software Foundation, Inc., 00016 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 00017 */ 00018 00019 00020 00021 static Bit8u DRC_CALL_CONV dynrec_add_byte(Bit8u op1,Bit8u op2) DRC_FC; 00022 static Bit8u DRC_CALL_CONV dynrec_add_byte(Bit8u op1,Bit8u op2) { 00023 lf_var1b=op1; 00024 lf_var2b=op2; 00025 lf_resb=(Bit8u)(lf_var1b+lf_var2b); 00026 lflags.type=t_ADDb; 00027 return lf_resb; 00028 } 00029 00030 static Bit8u DRC_CALL_CONV dynrec_add_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00031 static Bit8u DRC_CALL_CONV dynrec_add_byte_simple(Bit8u op1,Bit8u op2) { 00032 return op1+op2; 00033 } 00034 00035 static Bit8u DRC_CALL_CONV dynrec_adc_byte(Bit8u op1,Bit8u op2) DRC_FC; 00036 static Bit8u DRC_CALL_CONV dynrec_adc_byte(Bit8u op1,Bit8u op2) { 00037 lflags.oldcf=get_CF()!=0; 00038 lf_var1b=op1; 00039 lf_var2b=op2; 00040 lf_resb=(Bit8u)(lf_var1b+lf_var2b+lflags.oldcf); 00041 lflags.type=t_ADCb; 00042 return lf_resb; 00043 } 00044 00045 static Bit8u DRC_CALL_CONV dynrec_adc_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00046 static Bit8u DRC_CALL_CONV dynrec_adc_byte_simple(Bit8u op1,Bit8u op2) { 00047 return (Bit8u)(op1+op2+(Bitu)(get_CF()!=0)); 00048 } 00049 00050 static Bit8u DRC_CALL_CONV dynrec_sub_byte(Bit8u op1,Bit8u op2) DRC_FC; 00051 static Bit8u DRC_CALL_CONV dynrec_sub_byte(Bit8u op1,Bit8u op2) { 00052 lf_var1b=op1; 00053 lf_var2b=op2; 00054 lf_resb=(Bit8u)(lf_var1b-lf_var2b); 00055 lflags.type=t_SUBb; 00056 return lf_resb; 00057 } 00058 00059 static Bit8u DRC_CALL_CONV dynrec_sub_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00060 static Bit8u DRC_CALL_CONV dynrec_sub_byte_simple(Bit8u op1,Bit8u op2) { 00061 return op1-op2; 00062 } 00063 00064 static Bit8u DRC_CALL_CONV dynrec_sbb_byte(Bit8u op1,Bit8u op2) DRC_FC; 00065 static Bit8u DRC_CALL_CONV dynrec_sbb_byte(Bit8u op1,Bit8u op2) { 00066 lflags.oldcf=get_CF()!=0; 00067 lf_var1b=op1; 00068 lf_var2b=op2; 00069 lf_resb=(Bit8u)(lf_var1b-(lf_var2b+lflags.oldcf)); 00070 lflags.type=t_SBBb; 00071 return lf_resb; 00072 } 00073 00074 static Bit8u DRC_CALL_CONV dynrec_sbb_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00075 static Bit8u DRC_CALL_CONV dynrec_sbb_byte_simple(Bit8u op1,Bit8u op2) { 00076 return (Bit8u)(op1-(op2+(Bitu)(get_CF()!=0))); 00077 } 00078 00079 static void DRC_CALL_CONV dynrec_cmp_byte(Bit8u op1,Bit8u op2) DRC_FC; 00080 static void DRC_CALL_CONV dynrec_cmp_byte(Bit8u op1,Bit8u op2) { 00081 lf_var1b=op1; 00082 lf_var2b=op2; 00083 lf_resb=(Bit8u)(lf_var1b-lf_var2b); 00084 lflags.type=t_CMPb; 00085 } 00086 00087 static void DRC_CALL_CONV dynrec_cmp_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00088 static void DRC_CALL_CONV dynrec_cmp_byte_simple(Bit8u op1,Bit8u op2) { 00089 (void)op1; 00090 (void)op2; 00091 } 00092 00093 static Bit8u DRC_CALL_CONV dynrec_xor_byte(Bit8u op1,Bit8u op2) DRC_FC; 00094 static Bit8u DRC_CALL_CONV dynrec_xor_byte(Bit8u op1,Bit8u op2) { 00095 lf_var1b=op1; 00096 lf_var2b=op2; 00097 lf_resb=lf_var1b ^ lf_var2b; 00098 lflags.type=t_XORb; 00099 return lf_resb; 00100 } 00101 00102 static Bit8u DRC_CALL_CONV dynrec_xor_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00103 static Bit8u DRC_CALL_CONV dynrec_xor_byte_simple(Bit8u op1,Bit8u op2) { 00104 return op1 ^ op2; 00105 } 00106 00107 static Bit8u DRC_CALL_CONV dynrec_and_byte(Bit8u op1,Bit8u op2) DRC_FC; 00108 static Bit8u DRC_CALL_CONV dynrec_and_byte(Bit8u op1,Bit8u op2) { 00109 lf_var1b=op1; 00110 lf_var2b=op2; 00111 lf_resb=lf_var1b & lf_var2b; 00112 lflags.type=t_ANDb; 00113 return lf_resb; 00114 } 00115 00116 static Bit8u DRC_CALL_CONV dynrec_and_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00117 static Bit8u DRC_CALL_CONV dynrec_and_byte_simple(Bit8u op1,Bit8u op2) { 00118 return op1 & op2; 00119 } 00120 00121 static Bit8u DRC_CALL_CONV dynrec_or_byte(Bit8u op1,Bit8u op2) DRC_FC; 00122 static Bit8u DRC_CALL_CONV dynrec_or_byte(Bit8u op1,Bit8u op2) { 00123 lf_var1b=op1; 00124 lf_var2b=op2; 00125 lf_resb=lf_var1b | lf_var2b; 00126 lflags.type=t_ORb; 00127 return lf_resb; 00128 } 00129 00130 static Bit8u DRC_CALL_CONV dynrec_or_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00131 static Bit8u DRC_CALL_CONV dynrec_or_byte_simple(Bit8u op1,Bit8u op2) { 00132 return op1 | op2; 00133 } 00134 00135 static void DRC_CALL_CONV dynrec_test_byte(Bit8u op1,Bit8u op2) DRC_FC; 00136 static void DRC_CALL_CONV dynrec_test_byte(Bit8u op1,Bit8u op2) { 00137 lf_var1b=op1; 00138 lf_var2b=op2; 00139 lf_resb=lf_var1b & lf_var2b; 00140 lflags.type=t_TESTb; 00141 } 00142 00143 static void DRC_CALL_CONV dynrec_test_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00144 static void DRC_CALL_CONV dynrec_test_byte_simple(Bit8u op1,Bit8u op2) { 00145 (void)op1; 00146 (void)op2; 00147 } 00148 00149 static Bit16u DRC_CALL_CONV dynrec_add_word(Bit16u op1,Bit16u op2) DRC_FC; 00150 static Bit16u DRC_CALL_CONV dynrec_add_word(Bit16u op1,Bit16u op2) { 00151 lf_var1w=op1; 00152 lf_var2w=op2; 00153 lf_resw=(Bit16u)(lf_var1w+lf_var2w); 00154 lflags.type=t_ADDw; 00155 return lf_resw; 00156 } 00157 00158 static Bit16u DRC_CALL_CONV dynrec_add_word_simple(Bit16u op1,Bit16u op2) DRC_FC; 00159 static Bit16u DRC_CALL_CONV dynrec_add_word_simple(Bit16u op1,Bit16u op2) { 00160 return op1+op2; 00161 } 00162 00163 static Bit16u DRC_CALL_CONV dynrec_adc_word(Bit16u op1,Bit16u op2) DRC_FC; 00164 static Bit16u DRC_CALL_CONV dynrec_adc_word(Bit16u op1,Bit16u op2) { 00165 lflags.oldcf=get_CF()!=0; 00166 lf_var1w=op1; 00167 lf_var2w=op2; 00168 lf_resw=(Bit16u)(lf_var1w+lf_var2w+lflags.oldcf); 00169 lflags.type=t_ADCw; 00170 return lf_resw; 00171 } 00172 00173 static Bit16u DRC_CALL_CONV dynrec_adc_word_simple(Bit16u op1,Bit16u op2) DRC_FC; 00174 static Bit16u DRC_CALL_CONV dynrec_adc_word_simple(Bit16u op1,Bit16u op2) { 00175 return (Bit16u)(op1+op2+(Bitu)(get_CF()!=0)); 00176 } 00177 00178 static Bit16u DRC_CALL_CONV dynrec_sub_word(Bit16u op1,Bit16u op2) DRC_FC; 00179 static Bit16u DRC_CALL_CONV dynrec_sub_word(Bit16u op1,Bit16u op2) { 00180 lf_var1w=op1; 00181 lf_var2w=op2; 00182 lf_resw=(Bit16u)(lf_var1w-lf_var2w); 00183 lflags.type=t_SUBw; 00184 return lf_resw; 00185 } 00186 00187 static Bit16u DRC_CALL_CONV dynrec_sub_word_simple(Bit16u op1,Bit16u op2) DRC_FC; 00188 static Bit16u DRC_CALL_CONV dynrec_sub_word_simple(Bit16u op1,Bit16u op2) { 00189 return op1-op2; 00190 } 00191 00192 static Bit16u DRC_CALL_CONV dynrec_sbb_word(Bit16u op1,Bit16u op2) DRC_FC; 00193 static Bit16u DRC_CALL_CONV dynrec_sbb_word(Bit16u op1,Bit16u op2) { 00194 lflags.oldcf=get_CF()!=0; 00195 lf_var1w=op1; 00196 lf_var2w=op2; 00197 lf_resw=(Bit16u)(lf_var1w-(lf_var2w+lflags.oldcf)); 00198 lflags.type=t_SBBw; 00199 return lf_resw; 00200 } 00201 00202 static Bit16u DRC_CALL_CONV dynrec_sbb_word_simple(Bit16u op1,Bit16u op2) DRC_FC; 00203 static Bit16u DRC_CALL_CONV dynrec_sbb_word_simple(Bit16u op1,Bit16u op2) { 00204 return (Bit16u)(op1-(op2+(Bitu)(get_CF()!=0))); 00205 } 00206 00207 static void DRC_CALL_CONV dynrec_cmp_word(Bit16u op1,Bit16u op2) DRC_FC; 00208 static void DRC_CALL_CONV dynrec_cmp_word(Bit16u op1,Bit16u op2) { 00209 lf_var1w=op1; 00210 lf_var2w=op2; 00211 lf_resw=(Bit16u)(lf_var1w-lf_var2w); 00212 lflags.type=t_CMPw; 00213 } 00214 00215 static void DRC_CALL_CONV dynrec_cmp_word_simple(Bit16u op1,Bit16u op2) DRC_FC; 00216 static void DRC_CALL_CONV dynrec_cmp_word_simple(Bit16u op1,Bit16u op2) { 00217 (void)op1; 00218 (void)op2; 00219 } 00220 00221 static Bit16u DRC_CALL_CONV dynrec_xor_word(Bit16u op1,Bit16u op2) DRC_FC; 00222 static Bit16u DRC_CALL_CONV dynrec_xor_word(Bit16u op1,Bit16u op2) { 00223 lf_var1w=op1; 00224 lf_var2w=op2; 00225 lf_resw=lf_var1w ^ lf_var2w; 00226 lflags.type=t_XORw; 00227 return lf_resw; 00228 } 00229 00230 static Bit16u DRC_CALL_CONV dynrec_xor_word_simple(Bit16u op1,Bit16u op2) DRC_FC; 00231 static Bit16u DRC_CALL_CONV dynrec_xor_word_simple(Bit16u op1,Bit16u op2) { 00232 return op1 ^ op2; 00233 } 00234 00235 static Bit16u DRC_CALL_CONV dynrec_and_word(Bit16u op1,Bit16u op2) DRC_FC; 00236 static Bit16u DRC_CALL_CONV dynrec_and_word(Bit16u op1,Bit16u op2) { 00237 lf_var1w=op1; 00238 lf_var2w=op2; 00239 lf_resw=lf_var1w & lf_var2w; 00240 lflags.type=t_ANDw; 00241 return lf_resw; 00242 } 00243 00244 static Bit16u DRC_CALL_CONV dynrec_and_word_simple(Bit16u op1,Bit16u op2) DRC_FC; 00245 static Bit16u DRC_CALL_CONV dynrec_and_word_simple(Bit16u op1,Bit16u op2) { 00246 return op1 & op2; 00247 } 00248 00249 static Bit16u DRC_CALL_CONV dynrec_or_word(Bit16u op1,Bit16u op2) DRC_FC; 00250 static Bit16u DRC_CALL_CONV dynrec_or_word(Bit16u op1,Bit16u op2) { 00251 lf_var1w=op1; 00252 lf_var2w=op2; 00253 lf_resw=lf_var1w | lf_var2w; 00254 lflags.type=t_ORw; 00255 return lf_resw; 00256 } 00257 00258 static Bit16u DRC_CALL_CONV dynrec_or_word_simple(Bit16u op1,Bit16u op2) DRC_FC; 00259 static Bit16u DRC_CALL_CONV dynrec_or_word_simple(Bit16u op1,Bit16u op2) { 00260 return op1 | op2; 00261 } 00262 00263 static void DRC_CALL_CONV dynrec_test_word(Bit16u op1,Bit16u op2) DRC_FC; 00264 static void DRC_CALL_CONV dynrec_test_word(Bit16u op1,Bit16u op2) { 00265 lf_var1w=op1; 00266 lf_var2w=op2; 00267 lf_resw=lf_var1w & lf_var2w; 00268 lflags.type=t_TESTw; 00269 } 00270 00271 static void DRC_CALL_CONV dynrec_test_word_simple(Bit16u op1,Bit16u op2) DRC_FC; 00272 static void DRC_CALL_CONV dynrec_test_word_simple(Bit16u op1,Bit16u op2) { 00273 (void)op1; 00274 (void)op2; 00275 } 00276 00277 static Bit32u DRC_CALL_CONV dynrec_add_dword(Bit32u op1,Bit32u op2) DRC_FC; 00278 static Bit32u DRC_CALL_CONV dynrec_add_dword(Bit32u op1,Bit32u op2) { 00279 lf_var1d=op1; 00280 lf_var2d=op2; 00281 lf_resd=lf_var1d+lf_var2d; 00282 lflags.type=t_ADDd; 00283 return lf_resd; 00284 } 00285 00286 static Bit32u DRC_CALL_CONV dynrec_add_dword_simple(Bit32u op1,Bit32u op2) DRC_FC; 00287 static Bit32u DRC_CALL_CONV dynrec_add_dword_simple(Bit32u op1,Bit32u op2) { 00288 return op1 + op2; 00289 } 00290 00291 static Bit32u DRC_CALL_CONV dynrec_adc_dword(Bit32u op1,Bit32u op2) DRC_FC; 00292 static Bit32u DRC_CALL_CONV dynrec_adc_dword(Bit32u op1,Bit32u op2) { 00293 lflags.oldcf=get_CF()!=0; 00294 lf_var1d=op1; 00295 lf_var2d=op2; 00296 lf_resd=lf_var1d+lf_var2d+lflags.oldcf; 00297 lflags.type=t_ADCd; 00298 return lf_resd; 00299 } 00300 00301 static Bit32u DRC_CALL_CONV dynrec_adc_dword_simple(Bit32u op1,Bit32u op2) DRC_FC; 00302 static Bit32u DRC_CALL_CONV dynrec_adc_dword_simple(Bit32u op1,Bit32u op2) { 00303 return op1+op2+(Bitu)(get_CF()!=0); 00304 } 00305 00306 static Bit32u DRC_CALL_CONV dynrec_sub_dword(Bit32u op1,Bit32u op2) DRC_FC; 00307 static Bit32u DRC_CALL_CONV dynrec_sub_dword(Bit32u op1,Bit32u op2) { 00308 lf_var1d=op1; 00309 lf_var2d=op2; 00310 lf_resd=lf_var1d-lf_var2d; 00311 lflags.type=t_SUBd; 00312 return lf_resd; 00313 } 00314 00315 static Bit32u DRC_CALL_CONV dynrec_sub_dword_simple(Bit32u op1,Bit32u op2) DRC_FC; 00316 static Bit32u DRC_CALL_CONV dynrec_sub_dword_simple(Bit32u op1,Bit32u op2) { 00317 return op1-op2; 00318 } 00319 00320 static Bit32u DRC_CALL_CONV dynrec_sbb_dword(Bit32u op1,Bit32u op2) DRC_FC; 00321 static Bit32u DRC_CALL_CONV dynrec_sbb_dword(Bit32u op1,Bit32u op2) { 00322 lflags.oldcf=get_CF()!=0; 00323 lf_var1d=op1; 00324 lf_var2d=op2; 00325 lf_resd=lf_var1d-(lf_var2d+lflags.oldcf); 00326 lflags.type=t_SBBd; 00327 return lf_resd; 00328 } 00329 00330 static Bit32u DRC_CALL_CONV dynrec_sbb_dword_simple(Bit32u op1,Bit32u op2) DRC_FC; 00331 static Bit32u DRC_CALL_CONV dynrec_sbb_dword_simple(Bit32u op1,Bit32u op2) { 00332 return op1-(op2+(Bitu)(get_CF()!=0)); 00333 } 00334 00335 static void DRC_CALL_CONV dynrec_cmp_dword(Bit32u op1,Bit32u op2) DRC_FC; 00336 static void DRC_CALL_CONV dynrec_cmp_dword(Bit32u op1,Bit32u op2) { 00337 lf_var1d=op1; 00338 lf_var2d=op2; 00339 lf_resd=lf_var1d-lf_var2d; 00340 lflags.type=t_CMPd; 00341 } 00342 00343 static void DRC_CALL_CONV dynrec_cmp_dword_simple(Bit32u op1,Bit32u op2) DRC_FC; 00344 static void DRC_CALL_CONV dynrec_cmp_dword_simple(Bit32u op1,Bit32u op2) { 00345 (void)op1; 00346 (void)op2; 00347 } 00348 00349 static Bit32u DRC_CALL_CONV dynrec_xor_dword(Bit32u op1,Bit32u op2) DRC_FC; 00350 static Bit32u DRC_CALL_CONV dynrec_xor_dword(Bit32u op1,Bit32u op2) { 00351 lf_var1d=op1; 00352 lf_var2d=op2; 00353 lf_resd=lf_var1d ^ lf_var2d; 00354 lflags.type=t_XORd; 00355 return lf_resd; 00356 } 00357 00358 static Bit32u DRC_CALL_CONV dynrec_xor_dword_simple(Bit32u op1,Bit32u op2) DRC_FC; 00359 static Bit32u DRC_CALL_CONV dynrec_xor_dword_simple(Bit32u op1,Bit32u op2) { 00360 return op1 ^ op2; 00361 } 00362 00363 static Bit32u DRC_CALL_CONV dynrec_and_dword(Bit32u op1,Bit32u op2) DRC_FC; 00364 static Bit32u DRC_CALL_CONV dynrec_and_dword(Bit32u op1,Bit32u op2) { 00365 lf_var1d=op1; 00366 lf_var2d=op2; 00367 lf_resd=lf_var1d & lf_var2d; 00368 lflags.type=t_ANDd; 00369 return lf_resd; 00370 } 00371 00372 static Bit32u DRC_CALL_CONV dynrec_and_dword_simple(Bit32u op1,Bit32u op2) DRC_FC; 00373 static Bit32u DRC_CALL_CONV dynrec_and_dword_simple(Bit32u op1,Bit32u op2) { 00374 return op1 & op2; 00375 } 00376 00377 static Bit32u DRC_CALL_CONV dynrec_or_dword(Bit32u op1,Bit32u op2) DRC_FC; 00378 static Bit32u DRC_CALL_CONV dynrec_or_dword(Bit32u op1,Bit32u op2) { 00379 lf_var1d=op1; 00380 lf_var2d=op2; 00381 lf_resd=lf_var1d | lf_var2d; 00382 lflags.type=t_ORd; 00383 return lf_resd; 00384 } 00385 00386 static Bit32u DRC_CALL_CONV dynrec_or_dword_simple(Bit32u op1,Bit32u op2) DRC_FC; 00387 static Bit32u DRC_CALL_CONV dynrec_or_dword_simple(Bit32u op1,Bit32u op2) { 00388 return op1 | op2; 00389 } 00390 00391 static void DRC_CALL_CONV dynrec_test_dword(Bit32u op1,Bit32u op2) DRC_FC; 00392 static void DRC_CALL_CONV dynrec_test_dword(Bit32u op1,Bit32u op2) { 00393 lf_var1d=op1; 00394 lf_var2d=op2; 00395 lf_resd=lf_var1d & lf_var2d; 00396 lflags.type=t_TESTd; 00397 } 00398 00399 static void DRC_CALL_CONV dynrec_test_dword_simple(Bit32u op1,Bit32u op2) DRC_FC; 00400 static void DRC_CALL_CONV dynrec_test_dword_simple(Bit32u op1,Bit32u op2) { 00401 (void)op1; 00402 (void)op2; 00403 } 00404 00405 00406 static void dyn_dop_byte_gencall(DualOps op) { 00407 switch (op) { 00408 case DOP_ADD: 00409 InvalidateFlags(dynrec_add_byte_simple,t_ADDb); 00410 gen_call_function_raw(dynrec_add_byte); 00411 break; 00412 case DOP_ADC: 00413 AcquireFlags(FLAG_CF); 00414 InvalidateFlagsPartially(dynrec_adc_byte_simple,t_ADCb); 00415 gen_call_function_raw(dynrec_adc_byte); 00416 break; 00417 case DOP_SUB: 00418 InvalidateFlags(dynrec_sub_byte_simple,t_SUBb); 00419 gen_call_function_raw(dynrec_sub_byte); 00420 break; 00421 case DOP_SBB: 00422 AcquireFlags(FLAG_CF); 00423 InvalidateFlagsPartially(dynrec_sbb_byte_simple,t_SBBb); 00424 gen_call_function_raw(dynrec_sbb_byte); 00425 break; 00426 case DOP_CMP: 00427 InvalidateFlags(dynrec_cmp_byte_simple,t_CMPb); 00428 gen_call_function_raw(dynrec_cmp_byte); 00429 break; 00430 case DOP_XOR: 00431 InvalidateFlags(dynrec_xor_byte_simple,t_XORb); 00432 gen_call_function_raw(dynrec_xor_byte); 00433 break; 00434 case DOP_AND: 00435 InvalidateFlags(dynrec_and_byte_simple,t_ANDb); 00436 gen_call_function_raw(dynrec_and_byte); 00437 break; 00438 case DOP_OR: 00439 InvalidateFlags(dynrec_or_byte_simple,t_ORb); 00440 gen_call_function_raw(dynrec_or_byte); 00441 break; 00442 case DOP_TEST: 00443 InvalidateFlags(dynrec_test_byte_simple,t_TESTb); 00444 gen_call_function_raw(dynrec_test_byte); 00445 break; 00446 default: IllegalOptionDynrec("dyn_dop_byte_gencall"); 00447 } 00448 } 00449 00450 static void dyn_dop_word_gencall(DualOps op,bool dword) { 00451 if (dword) { 00452 switch (op) { 00453 case DOP_ADD: 00454 InvalidateFlags(dynrec_add_dword_simple,t_ADDd); 00455 gen_call_function_raw(dynrec_add_dword); 00456 break; 00457 case DOP_ADC: 00458 AcquireFlags(FLAG_CF); 00459 InvalidateFlagsPartially(dynrec_adc_dword_simple,t_ADCd); 00460 gen_call_function_raw(dynrec_adc_dword); 00461 break; 00462 case DOP_SUB: 00463 InvalidateFlags(dynrec_sub_dword_simple,t_SUBd); 00464 gen_call_function_raw(dynrec_sub_dword); 00465 break; 00466 case DOP_SBB: 00467 AcquireFlags(FLAG_CF); 00468 InvalidateFlagsPartially(dynrec_sbb_dword_simple,t_SBBd); 00469 gen_call_function_raw(dynrec_sbb_dword); 00470 break; 00471 case DOP_CMP: 00472 InvalidateFlags(dynrec_cmp_dword_simple,t_CMPd); 00473 gen_call_function_raw(dynrec_cmp_dword); 00474 break; 00475 case DOP_XOR: 00476 InvalidateFlags(dynrec_xor_dword_simple,t_XORd); 00477 gen_call_function_raw(dynrec_xor_dword); 00478 break; 00479 case DOP_AND: 00480 InvalidateFlags(dynrec_and_dword_simple,t_ANDd); 00481 gen_call_function_raw(dynrec_and_dword); 00482 break; 00483 case DOP_OR: 00484 InvalidateFlags(dynrec_or_dword_simple,t_ORd); 00485 gen_call_function_raw(dynrec_or_dword); 00486 break; 00487 case DOP_TEST: 00488 InvalidateFlags(dynrec_test_dword_simple,t_TESTd); 00489 gen_call_function_raw(dynrec_test_dword); 00490 break; 00491 default: IllegalOptionDynrec("dyn_dop_dword_gencall"); 00492 } 00493 } else { 00494 switch (op) { 00495 case DOP_ADD: 00496 InvalidateFlags(dynrec_add_word_simple,t_ADDw); 00497 gen_call_function_raw(dynrec_add_word); 00498 break; 00499 case DOP_ADC: 00500 AcquireFlags(FLAG_CF); 00501 InvalidateFlagsPartially(dynrec_adc_word_simple,t_ADCw); 00502 gen_call_function_raw(dynrec_adc_word); 00503 break; 00504 case DOP_SUB: 00505 InvalidateFlags(dynrec_sub_word_simple,t_SUBw); 00506 gen_call_function_raw(dynrec_sub_word); 00507 break; 00508 case DOP_SBB: 00509 AcquireFlags(FLAG_CF); 00510 InvalidateFlagsPartially(dynrec_sbb_word_simple,t_SBBw); 00511 gen_call_function_raw(dynrec_sbb_word); 00512 break; 00513 case DOP_CMP: 00514 InvalidateFlags(dynrec_cmp_word_simple,t_CMPw); 00515 gen_call_function_raw(dynrec_cmp_word); 00516 break; 00517 case DOP_XOR: 00518 InvalidateFlags(dynrec_xor_word_simple,t_XORw); 00519 gen_call_function_raw(dynrec_xor_word); 00520 break; 00521 case DOP_AND: 00522 InvalidateFlags(dynrec_and_word_simple,t_ANDw); 00523 gen_call_function_raw(dynrec_and_word); 00524 break; 00525 case DOP_OR: 00526 InvalidateFlags(dynrec_or_word_simple,t_ORw); 00527 gen_call_function_raw(dynrec_or_word); 00528 break; 00529 case DOP_TEST: 00530 InvalidateFlags(dynrec_test_word_simple,t_TESTw); 00531 gen_call_function_raw(dynrec_test_word); 00532 break; 00533 default: IllegalOptionDynrec("dyn_dop_word_gencall"); 00534 } 00535 } 00536 } 00537 00538 00539 static Bit8u DRC_CALL_CONV dynrec_inc_byte(Bit8u op) DRC_FC; 00540 static Bit8u DRC_CALL_CONV dynrec_inc_byte(Bit8u op) { 00541 LoadCF; 00542 lf_var1b=op; 00543 lf_resb=lf_var1b+1; 00544 lflags.type=t_INCb; 00545 return lf_resb; 00546 } 00547 00548 static Bit8u DRC_CALL_CONV dynrec_inc_byte_simple(Bit8u op) DRC_FC; 00549 static Bit8u DRC_CALL_CONV dynrec_inc_byte_simple(Bit8u op) { 00550 return op+1; 00551 } 00552 00553 static Bit8u DRC_CALL_CONV dynrec_dec_byte(Bit8u op) DRC_FC; 00554 static Bit8u DRC_CALL_CONV dynrec_dec_byte(Bit8u op) { 00555 LoadCF; 00556 lf_var1b=op; 00557 lf_resb=lf_var1b-1; 00558 lflags.type=t_DECb; 00559 return lf_resb; 00560 } 00561 00562 static Bit8u DRC_CALL_CONV dynrec_dec_byte_simple(Bit8u op) DRC_FC; 00563 static Bit8u DRC_CALL_CONV dynrec_dec_byte_simple(Bit8u op) { 00564 return op-1; 00565 } 00566 00567 static Bit8u DRC_CALL_CONV dynrec_not_byte(Bit8u op) DRC_FC; 00568 static Bit8u DRC_CALL_CONV dynrec_not_byte(Bit8u op) { 00569 return ~op; 00570 } 00571 00572 static Bit8u DRC_CALL_CONV dynrec_neg_byte(Bit8u op) DRC_FC; 00573 static Bit8u DRC_CALL_CONV dynrec_neg_byte(Bit8u op) { 00574 lf_var1b=op; 00575 lf_resb=0-lf_var1b; 00576 lflags.type=t_NEGb; 00577 return lf_resb; 00578 } 00579 00580 static Bit8u DRC_CALL_CONV dynrec_neg_byte_simple(Bit8u op) DRC_FC; 00581 static Bit8u DRC_CALL_CONV dynrec_neg_byte_simple(Bit8u op) { 00582 return 0-op; 00583 } 00584 00585 static Bit16u DRC_CALL_CONV dynrec_inc_word(Bit16u op) DRC_FC; 00586 static Bit16u DRC_CALL_CONV dynrec_inc_word(Bit16u op) { 00587 LoadCF; 00588 lf_var1w=op; 00589 lf_resw=lf_var1w+1; 00590 lflags.type=t_INCw; 00591 return lf_resw; 00592 } 00593 00594 static Bit16u DRC_CALL_CONV dynrec_inc_word_simple(Bit16u op) DRC_FC; 00595 static Bit16u DRC_CALL_CONV dynrec_inc_word_simple(Bit16u op) { 00596 return op+1; 00597 } 00598 00599 static Bit16u DRC_CALL_CONV dynrec_dec_word(Bit16u op) DRC_FC; 00600 static Bit16u DRC_CALL_CONV dynrec_dec_word(Bit16u op) { 00601 LoadCF; 00602 lf_var1w=op; 00603 lf_resw=lf_var1w-1; 00604 lflags.type=t_DECw; 00605 return lf_resw; 00606 } 00607 00608 static Bit16u DRC_CALL_CONV dynrec_dec_word_simple(Bit16u op) DRC_FC; 00609 static Bit16u DRC_CALL_CONV dynrec_dec_word_simple(Bit16u op) { 00610 return op-1; 00611 } 00612 00613 static Bit16u DRC_CALL_CONV dynrec_not_word(Bit16u op) DRC_FC; 00614 static Bit16u DRC_CALL_CONV dynrec_not_word(Bit16u op) { 00615 return ~op; 00616 } 00617 00618 static Bit16u DRC_CALL_CONV dynrec_neg_word(Bit16u op) DRC_FC; 00619 static Bit16u DRC_CALL_CONV dynrec_neg_word(Bit16u op) { 00620 lf_var1w=op; 00621 lf_resw=0-lf_var1w; 00622 lflags.type=t_NEGw; 00623 return lf_resw; 00624 } 00625 00626 static Bit16u DRC_CALL_CONV dynrec_neg_word_simple(Bit16u op) DRC_FC; 00627 static Bit16u DRC_CALL_CONV dynrec_neg_word_simple(Bit16u op) { 00628 return 0-op; 00629 } 00630 00631 static Bit32u DRC_CALL_CONV dynrec_inc_dword(Bit32u op) DRC_FC; 00632 static Bit32u DRC_CALL_CONV dynrec_inc_dword(Bit32u op) { 00633 LoadCF; 00634 lf_var1d=op; 00635 lf_resd=lf_var1d+1; 00636 lflags.type=t_INCd; 00637 return lf_resd; 00638 } 00639 00640 static Bit32u DRC_CALL_CONV dynrec_inc_dword_simple(Bit32u op) DRC_FC; 00641 static Bit32u DRC_CALL_CONV dynrec_inc_dword_simple(Bit32u op) { 00642 return op+1; 00643 } 00644 00645 static Bit32u DRC_CALL_CONV dynrec_dec_dword(Bit32u op) DRC_FC; 00646 static Bit32u DRC_CALL_CONV dynrec_dec_dword(Bit32u op) { 00647 LoadCF; 00648 lf_var1d=op; 00649 lf_resd=lf_var1d-1; 00650 lflags.type=t_DECd; 00651 return lf_resd; 00652 } 00653 00654 static Bit32u DRC_CALL_CONV dynrec_dec_dword_simple(Bit32u op) DRC_FC; 00655 static Bit32u DRC_CALL_CONV dynrec_dec_dword_simple(Bit32u op) { 00656 return op-1; 00657 } 00658 00659 static Bit32u DRC_CALL_CONV dynrec_not_dword(Bit32u op) DRC_FC; 00660 static Bit32u DRC_CALL_CONV dynrec_not_dword(Bit32u op) { 00661 return ~op; 00662 } 00663 00664 static Bit32u DRC_CALL_CONV dynrec_neg_dword(Bit32u op) DRC_FC; 00665 static Bit32u DRC_CALL_CONV dynrec_neg_dword(Bit32u op) { 00666 lf_var1d=op; 00667 lf_resd=0-lf_var1d; 00668 lflags.type=t_NEGd; 00669 return lf_resd; 00670 } 00671 00672 static Bit32u DRC_CALL_CONV dynrec_neg_dword_simple(Bit32u op) DRC_FC; 00673 static Bit32u DRC_CALL_CONV dynrec_neg_dword_simple(Bit32u op) { 00674 return 0-op; 00675 } 00676 00677 00678 static void dyn_sop_byte_gencall(SingleOps op) { 00679 switch (op) { 00680 case SOP_INC: 00681 InvalidateFlagsPartially(dynrec_inc_byte_simple,t_INCb); 00682 gen_call_function_raw(dynrec_inc_byte); 00683 break; 00684 case SOP_DEC: 00685 InvalidateFlagsPartially(dynrec_dec_byte_simple,t_DECb); 00686 gen_call_function_raw(dynrec_dec_byte); 00687 break; 00688 case SOP_NOT: 00689 gen_call_function_raw(dynrec_not_byte); 00690 break; 00691 case SOP_NEG: 00692 InvalidateFlags(dynrec_neg_byte_simple,t_NEGb); 00693 gen_call_function_raw(dynrec_neg_byte); 00694 break; 00695 default: IllegalOptionDynrec("dyn_sop_byte_gencall"); 00696 } 00697 } 00698 00699 static void dyn_sop_word_gencall(SingleOps op,bool dword) { 00700 if (dword) { 00701 switch (op) { 00702 case SOP_INC: 00703 InvalidateFlagsPartially(dynrec_inc_dword_simple,t_INCd); 00704 gen_call_function_raw(dynrec_inc_dword); 00705 break; 00706 case SOP_DEC: 00707 InvalidateFlagsPartially(dynrec_dec_dword_simple,t_DECd); 00708 gen_call_function_raw(dynrec_dec_dword); 00709 break; 00710 case SOP_NOT: 00711 gen_call_function_raw(dynrec_not_dword); 00712 break; 00713 case SOP_NEG: 00714 InvalidateFlags(dynrec_neg_dword_simple,t_NEGd); 00715 gen_call_function_raw(dynrec_neg_dword); 00716 break; 00717 default: IllegalOptionDynrec("dyn_sop_dword_gencall"); 00718 } 00719 } else { 00720 switch (op) { 00721 case SOP_INC: 00722 InvalidateFlagsPartially(dynrec_inc_word_simple,t_INCw); 00723 gen_call_function_raw(dynrec_inc_word); 00724 break; 00725 case SOP_DEC: 00726 InvalidateFlagsPartially(dynrec_dec_word_simple,t_DECw); 00727 gen_call_function_raw(dynrec_dec_word); 00728 break; 00729 case SOP_NOT: 00730 gen_call_function_raw(dynrec_not_word); 00731 break; 00732 case SOP_NEG: 00733 InvalidateFlags(dynrec_neg_word_simple,t_NEGw); 00734 gen_call_function_raw(dynrec_neg_word); 00735 break; 00736 default: IllegalOptionDynrec("dyn_sop_word_gencall"); 00737 } 00738 } 00739 } 00740 00741 00742 static Bit8u DRC_CALL_CONV dynrec_rol_byte(Bit8u op1,Bit8u op2) DRC_FC; 00743 static Bit8u DRC_CALL_CONV dynrec_rol_byte(Bit8u op1,Bit8u op2) { 00744 if (!(op2&0x7)) { 00745 if (op2&0x18) { 00746 FillFlagsNoCFOF(); 00747 SETFLAGBIT(CF,op1 & 1); 00748 SETFLAGBIT(OF,(op1 & 1) ^ (op1 >> 7)); 00749 } 00750 return op1; 00751 } 00752 FillFlagsNoCFOF(); 00753 lf_var1b=op1; 00754 lf_var2b=op2&0x07; 00755 lf_resb=(lf_var1b << lf_var2b) | (lf_var1b >> (8-lf_var2b)); 00756 SETFLAGBIT(CF,lf_resb & 1); 00757 SETFLAGBIT(OF,(lf_resb & 1) ^ (lf_resb >> 7)); 00758 return lf_resb; 00759 } 00760 00761 static Bit8u DRC_CALL_CONV dynrec_rol_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00762 static Bit8u DRC_CALL_CONV dynrec_rol_byte_simple(Bit8u op1,Bit8u op2) { 00763 if (!(op2&0x7)) return op1; 00764 return (op1 << (op2&0x07)) | (op1 >> (8-(op2&0x07))); 00765 } 00766 00767 static Bit8u DRC_CALL_CONV dynrec_ror_byte(Bit8u op1,Bit8u op2) DRC_FC; 00768 static Bit8u DRC_CALL_CONV dynrec_ror_byte(Bit8u op1,Bit8u op2) { 00769 if (!(op2&0x7)) { 00770 if (op2&0x18) { 00771 FillFlagsNoCFOF(); 00772 SETFLAGBIT(CF,op1>>7); 00773 SETFLAGBIT(OF,(op1>>7) ^ ((op1>>6) & 1)); 00774 } 00775 return op1; 00776 } 00777 FillFlagsNoCFOF(); 00778 lf_var1b=op1; 00779 lf_var2b=op2&0x07; 00780 lf_resb=(lf_var1b >> lf_var2b) | (lf_var1b << (8-lf_var2b)); 00781 SETFLAGBIT(CF,lf_resb & 0x80); 00782 SETFLAGBIT(OF,(lf_resb ^ (lf_resb<<1)) & 0x80); 00783 return lf_resb; 00784 } 00785 00786 static Bit8u DRC_CALL_CONV dynrec_ror_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00787 static Bit8u DRC_CALL_CONV dynrec_ror_byte_simple(Bit8u op1,Bit8u op2) { 00788 if (!(op2&0x7)) return op1; 00789 return (op1 >> (op2&0x07)) | (op1 << (8-(op2&0x07))); 00790 } 00791 00792 static Bit8u DRC_CALL_CONV dynrec_rcl_byte(Bit8u op1,Bit8u op2) DRC_FC; 00793 static Bit8u DRC_CALL_CONV dynrec_rcl_byte(Bit8u op1,Bit8u op2) { 00794 if (op2%9) { 00795 Bit8u cf=(Bit8u)FillFlags()&0x1; 00796 lf_var1b=op1; 00797 lf_var2b=op2%9; 00798 lf_resb=(lf_var1b << lf_var2b) | (cf << (lf_var2b-1)) | (lf_var1b >> (9-lf_var2b)); 00799 SETFLAGBIT(CF,((lf_var1b >> (8-lf_var2b)) & 1)); 00800 SETFLAGBIT(OF,(reg_flags & 1) ^ (lf_resb >> 7)); 00801 return lf_resb; 00802 } else return op1; 00803 } 00804 00805 static Bit8u DRC_CALL_CONV dynrec_rcr_byte(Bit8u op1,Bit8u op2) DRC_FC; 00806 static Bit8u DRC_CALL_CONV dynrec_rcr_byte(Bit8u op1,Bit8u op2) { 00807 if (op2%9) { 00808 Bit8u cf=(Bit8u)FillFlags()&0x1; 00809 lf_var1b=op1; 00810 lf_var2b=op2%9; 00811 lf_resb=(lf_var1b >> lf_var2b) | (cf << (8-lf_var2b)) | (lf_var1b << (9-lf_var2b)); \ 00812 SETFLAGBIT(CF,(lf_var1b >> (lf_var2b - 1)) & 1); 00813 SETFLAGBIT(OF,(lf_resb ^ (lf_resb<<1)) & 0x80); 00814 return lf_resb; 00815 } else return op1; 00816 } 00817 00818 static Bit8u DRC_CALL_CONV dynrec_shl_byte(Bit8u op1,Bit8u op2) DRC_FC; 00819 static Bit8u DRC_CALL_CONV dynrec_shl_byte(Bit8u op1,Bit8u op2) { 00820 if (!op2) return op1; 00821 lf_var1b=op1; 00822 lf_var2b=op2; 00823 lf_resb=lf_var1b << lf_var2b; 00824 lflags.type=t_SHLb; 00825 return lf_resb; 00826 } 00827 00828 static Bit8u DRC_CALL_CONV dynrec_shl_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00829 static Bit8u DRC_CALL_CONV dynrec_shl_byte_simple(Bit8u op1,Bit8u op2) { 00830 if (!op2) return op1; 00831 return op1 << op2; 00832 } 00833 00834 static Bit8u DRC_CALL_CONV dynrec_shr_byte(Bit8u op1,Bit8u op2) DRC_FC; 00835 static Bit8u DRC_CALL_CONV dynrec_shr_byte(Bit8u op1,Bit8u op2) { 00836 if (!op2) return op1; 00837 lf_var1b=op1; 00838 lf_var2b=op2; 00839 lf_resb=lf_var1b >> lf_var2b; 00840 lflags.type=t_SHRb; 00841 return lf_resb; 00842 } 00843 00844 static Bit8u DRC_CALL_CONV dynrec_shr_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00845 static Bit8u DRC_CALL_CONV dynrec_shr_byte_simple(Bit8u op1,Bit8u op2) { 00846 if (!op2) return op1; 00847 return op1 >> op2; 00848 } 00849 00850 static Bit8u DRC_CALL_CONV dynrec_sar_byte(Bit8u op1,Bit8u op2) DRC_FC; 00851 static Bit8u DRC_CALL_CONV dynrec_sar_byte(Bit8u op1,Bit8u op2) { 00852 if (!op2) return op1; 00853 lf_var1b=op1; 00854 lf_var2b=op2; 00855 if (lf_var2b>8) lf_var2b=8; 00856 if (lf_var1b & 0x80) { 00857 lf_resb=(lf_var1b >> lf_var2b)| (0xff << (8 - lf_var2b)); 00858 } else { 00859 lf_resb=lf_var1b >> lf_var2b; 00860 } 00861 lflags.type=t_SARb; 00862 return lf_resb; 00863 } 00864 00865 static Bit8u DRC_CALL_CONV dynrec_sar_byte_simple(Bit8u op1,Bit8u op2) DRC_FC; 00866 static Bit8u DRC_CALL_CONV dynrec_sar_byte_simple(Bit8u op1,Bit8u op2) { 00867 if (!op2) return op1; 00868 if (op2>8) op2=8; 00869 if (op1 & 0x80) return (op1 >> op2) | (0xff << (8 - op2)); 00870 else return op1 >> op2; 00871 } 00872 00873 static Bit16u DRC_CALL_CONV dynrec_rol_word(Bit16u op1,Bit8u op2) DRC_FC; 00874 static Bit16u DRC_CALL_CONV dynrec_rol_word(Bit16u op1,Bit8u op2) { 00875 if (!(op2&0xf)) { 00876 if (op2&0x10) { 00877 FillFlagsNoCFOF(); 00878 SETFLAGBIT(CF,op1 & 1); 00879 SETFLAGBIT(OF,(op1 & 1) ^ (op1 >> 15)); 00880 } 00881 return op1; 00882 } 00883 FillFlagsNoCFOF(); 00884 lf_var1w=op1; 00885 lf_var2b=op2&0xf; 00886 lf_resw=(lf_var1w << lf_var2b) | (lf_var1w >> (16-lf_var2b)); 00887 SETFLAGBIT(CF,lf_resw & 1); 00888 SETFLAGBIT(OF,(lf_resw & 1) ^ (lf_resw >> 15)); 00889 return lf_resw; 00890 } 00891 00892 static Bit16u DRC_CALL_CONV dynrec_rol_word_simple(Bit16u op1,Bit8u op2) DRC_FC; 00893 static Bit16u DRC_CALL_CONV dynrec_rol_word_simple(Bit16u op1,Bit8u op2) { 00894 if (!(op2&0xf)) return op1; 00895 return (op1 << (op2&0xf)) | (op1 >> (16-(op2&0xf))); 00896 } 00897 00898 static Bit16u DRC_CALL_CONV dynrec_ror_word(Bit16u op1,Bit8u op2) DRC_FC; 00899 static Bit16u DRC_CALL_CONV dynrec_ror_word(Bit16u op1,Bit8u op2) { 00900 if (!(op2&0xf)) { 00901 if (op2&0x10) { 00902 FillFlagsNoCFOF(); 00903 SETFLAGBIT(CF,op1>>15); 00904 SETFLAGBIT(OF,(op1>>15) ^ ((op1>>14) & 1)); 00905 } 00906 return op1; 00907 } 00908 FillFlagsNoCFOF(); 00909 lf_var1w=op1; 00910 lf_var2b=op2&0xf; 00911 lf_resw=(lf_var1w >> lf_var2b) | (lf_var1w << (16-lf_var2b)); 00912 SETFLAGBIT(CF,lf_resw & 0x8000); 00913 SETFLAGBIT(OF,(lf_resw ^ (lf_resw<<1)) & 0x8000); 00914 return lf_resw; 00915 } 00916 00917 static Bit16u DRC_CALL_CONV dynrec_ror_word_simple(Bit16u op1,Bit8u op2) DRC_FC; 00918 static Bit16u DRC_CALL_CONV dynrec_ror_word_simple(Bit16u op1,Bit8u op2) { 00919 if (!(op2&0xf)) return op1; 00920 return (op1 >> (op2&0xf)) | (op1 << (16-(op2&0xf))); 00921 } 00922 00923 static Bit16u DRC_CALL_CONV dynrec_rcl_word(Bit16u op1,Bit8u op2) DRC_FC; 00924 static Bit16u DRC_CALL_CONV dynrec_rcl_word(Bit16u op1,Bit8u op2) { 00925 if (op2%17) { 00926 Bit16u cf=(Bit16u)FillFlags()&0x1; 00927 lf_var1w=op1; 00928 lf_var2b=op2%17; 00929 lf_resw=(lf_var1w << lf_var2b) | (cf << (lf_var2b-1)) | (lf_var1w >> (17-lf_var2b)); 00930 SETFLAGBIT(CF,((lf_var1w >> (16-lf_var2b)) & 1)); 00931 SETFLAGBIT(OF,(reg_flags & 1) ^ (lf_resw >> 15)); 00932 return lf_resw; 00933 } else return op1; 00934 } 00935 00936 static Bit16u DRC_CALL_CONV dynrec_rcr_word(Bit16u op1,Bit8u op2) DRC_FC; 00937 static Bit16u DRC_CALL_CONV dynrec_rcr_word(Bit16u op1,Bit8u op2) { 00938 if (op2%17) { 00939 Bit16u cf=(Bit16u)FillFlags()&0x1; 00940 lf_var1w=op1; 00941 lf_var2b=op2%17; 00942 lf_resw=(lf_var1w >> lf_var2b) | (cf << (16-lf_var2b)) | (lf_var1w << (17-lf_var2b)); 00943 SETFLAGBIT(CF,(lf_var1w >> (lf_var2b - 1)) & 1); 00944 SETFLAGBIT(OF,(lf_resw ^ (lf_resw<<1)) & 0x8000); 00945 return lf_resw; 00946 } else return op1; 00947 } 00948 00949 static Bit16u DRC_CALL_CONV dynrec_shl_word(Bit16u op1,Bit8u op2) DRC_FC; 00950 static Bit16u DRC_CALL_CONV dynrec_shl_word(Bit16u op1,Bit8u op2) { 00951 if (!op2) return op1; 00952 lf_var1w=op1; 00953 lf_var2b=op2; 00954 lf_resw=lf_var1w << lf_var2b; 00955 lflags.type=t_SHLw; 00956 return lf_resw; 00957 } 00958 00959 static Bit16u DRC_CALL_CONV dynrec_shl_word_simple(Bit16u op1,Bit8u op2) DRC_FC; 00960 static Bit16u DRC_CALL_CONV dynrec_shl_word_simple(Bit16u op1,Bit8u op2) { 00961 if (!op2) return op1; 00962 return op1 << op2; 00963 } 00964 00965 static Bit16u DRC_CALL_CONV dynrec_shr_word(Bit16u op1,Bit8u op2) DRC_FC; 00966 static Bit16u DRC_CALL_CONV dynrec_shr_word(Bit16u op1,Bit8u op2) { 00967 if (!op2) return op1; 00968 lf_var1w=op1; 00969 lf_var2b=op2; 00970 lf_resw=lf_var1w >> lf_var2b; 00971 lflags.type=t_SHRw; 00972 return lf_resw; 00973 } 00974 00975 static Bit16u DRC_CALL_CONV dynrec_shr_word_simple(Bit16u op1,Bit8u op2) DRC_FC; 00976 static Bit16u DRC_CALL_CONV dynrec_shr_word_simple(Bit16u op1,Bit8u op2) { 00977 if (!op2) return op1; 00978 return op1 >> op2; 00979 } 00980 00981 static Bit16u DRC_CALL_CONV dynrec_sar_word(Bit16u op1,Bit8u op2) DRC_FC; 00982 static Bit16u DRC_CALL_CONV dynrec_sar_word(Bit16u op1,Bit8u op2) { 00983 if (!op2) return op1; 00984 lf_var1w=op1; 00985 lf_var2b=op2; 00986 if (lf_var2b>16) lf_var2b=16; 00987 if (lf_var1w & 0x8000) { 00988 lf_resw=(lf_var1w >> lf_var2b) | (0xffff << (16 - lf_var2b)); 00989 } else { 00990 lf_resw=lf_var1w >> lf_var2b; 00991 } 00992 lflags.type=t_SARw; 00993 return lf_resw; 00994 } 00995 00996 static Bit16u DRC_CALL_CONV dynrec_sar_word_simple(Bit16u op1,Bit8u op2) DRC_FC; 00997 static Bit16u DRC_CALL_CONV dynrec_sar_word_simple(Bit16u op1,Bit8u op2) { 00998 if (!op2) return op1; 00999 if (op2>16) op2=16; 01000 if (op1 & 0x8000) return (op1 >> op2) | (0xffff << (16 - op2)); 01001 else return op1 >> op2; 01002 } 01003 01004 static Bit32u DRC_CALL_CONV dynrec_rol_dword(Bit32u op1,Bit8u op2) DRC_FC; 01005 static Bit32u DRC_CALL_CONV dynrec_rol_dword(Bit32u op1,Bit8u op2) { 01006 if (!op2) return op1; 01007 FillFlagsNoCFOF(); 01008 lf_var1d=op1; 01009 lf_var2b=op2; 01010 lf_resd=(lf_var1d << lf_var2b) | (lf_var1d >> (32-lf_var2b)); 01011 SETFLAGBIT(CF,lf_resd & 1); 01012 SETFLAGBIT(OF,(lf_resd & 1) ^ (lf_resd >> 31)); 01013 return lf_resd; 01014 } 01015 01016 static Bit32u DRC_CALL_CONV dynrec_rol_dword_simple(Bit32u op1,Bit8u op2) DRC_FC; 01017 static Bit32u DRC_CALL_CONV dynrec_rol_dword_simple(Bit32u op1,Bit8u op2) { 01018 if (!op2) return op1; 01019 return (op1 << op2) | (op1 >> (32-op2)); 01020 } 01021 01022 static Bit32u DRC_CALL_CONV dynrec_ror_dword(Bit32u op1,Bit8u op2) DRC_FC; 01023 static Bit32u DRC_CALL_CONV dynrec_ror_dword(Bit32u op1,Bit8u op2) { 01024 if (!op2) return op1; 01025 FillFlagsNoCFOF(); 01026 lf_var1d=op1; 01027 lf_var2b=op2; 01028 lf_resd=(lf_var1d >> lf_var2b) | (lf_var1d << (32-lf_var2b)); 01029 SETFLAGBIT(CF,lf_resd & 0x80000000); 01030 SETFLAGBIT(OF,(lf_resd ^ (lf_resd<<1)) & 0x80000000); 01031 return lf_resd; 01032 } 01033 01034 static Bit32u DRC_CALL_CONV dynrec_ror_dword_simple(Bit32u op1,Bit8u op2) DRC_FC; 01035 static Bit32u DRC_CALL_CONV dynrec_ror_dword_simple(Bit32u op1,Bit8u op2) { 01036 if (!op2) return op1; 01037 return (op1 >> op2) | (op1 << (32-op2)); 01038 } 01039 01040 static Bit32u DRC_CALL_CONV dynrec_rcl_dword(Bit32u op1,Bit8u op2) DRC_FC; 01041 static Bit32u DRC_CALL_CONV dynrec_rcl_dword(Bit32u op1,Bit8u op2) { 01042 if (!op2) return op1; 01043 Bit32u cf=(Bit32u)FillFlags()&0x1; 01044 lf_var1d=op1; 01045 lf_var2b=op2; 01046 if (lf_var2b==1) { 01047 lf_resd=(lf_var1d << 1) | cf; 01048 } else { 01049 lf_resd=(lf_var1d << lf_var2b) | (cf << (lf_var2b-1)) | (lf_var1d >> (33-lf_var2b)); 01050 } 01051 SETFLAGBIT(CF,((lf_var1d >> (32-lf_var2b)) & 1)); 01052 SETFLAGBIT(OF,(reg_flags & 1) ^ (lf_resd >> 31)); 01053 return lf_resd; 01054 } 01055 01056 static Bit32u DRC_CALL_CONV dynrec_rcr_dword(Bit32u op1,Bit8u op2) DRC_FC; 01057 static Bit32u DRC_CALL_CONV dynrec_rcr_dword(Bit32u op1,Bit8u op2) { 01058 if (op2) { 01059 Bit32u cf=(Bit32u)FillFlags()&0x1; 01060 lf_var1d=op1; 01061 lf_var2b=op2; 01062 if (lf_var2b==1) { 01063 lf_resd=lf_var1d >> 1 | cf << 31; 01064 } else { 01065 lf_resd=(lf_var1d >> lf_var2b) | (cf << (32-lf_var2b)) | (lf_var1d << (33-lf_var2b)); 01066 } 01067 SETFLAGBIT(CF,(lf_var1d >> (lf_var2b - 1)) & 1); 01068 SETFLAGBIT(OF,(lf_resd ^ (lf_resd<<1)) & 0x80000000); 01069 return lf_resd; 01070 } else return op1; 01071 } 01072 01073 static Bit32u DRC_CALL_CONV dynrec_shl_dword(Bit32u op1,Bit8u op2) DRC_FC; 01074 static Bit32u DRC_CALL_CONV dynrec_shl_dword(Bit32u op1,Bit8u op2) { 01075 if (!op2) return op1; 01076 lf_var1d=op1; 01077 lf_var2b=op2; 01078 lf_resd=lf_var1d << lf_var2b; 01079 lflags.type=t_SHLd; 01080 return lf_resd; 01081 } 01082 01083 static Bit32u DRC_CALL_CONV dynrec_shl_dword_simple(Bit32u op1,Bit8u op2) DRC_FC; 01084 static Bit32u DRC_CALL_CONV dynrec_shl_dword_simple(Bit32u op1,Bit8u op2) { 01085 if (!op2) return op1; 01086 return op1 << op2; 01087 } 01088 01089 static Bit32u DRC_CALL_CONV dynrec_shr_dword(Bit32u op1,Bit8u op2) DRC_FC; 01090 static Bit32u DRC_CALL_CONV dynrec_shr_dword(Bit32u op1,Bit8u op2) { 01091 if (!op2) return op1; 01092 lf_var1d=op1; 01093 lf_var2b=op2; 01094 lf_resd=lf_var1d >> lf_var2b; 01095 lflags.type=t_SHRd; 01096 return lf_resd; 01097 } 01098 01099 static Bit32u DRC_CALL_CONV dynrec_shr_dword_simple(Bit32u op1,Bit8u op2) DRC_FC; 01100 static Bit32u DRC_CALL_CONV dynrec_shr_dword_simple(Bit32u op1,Bit8u op2) { 01101 if (!op2) return op1; 01102 return op1 >> op2; 01103 } 01104 01105 static Bit32u DRC_CALL_CONV dynrec_sar_dword(Bit32u op1,Bit8u op2) DRC_FC; 01106 static Bit32u DRC_CALL_CONV dynrec_sar_dword(Bit32u op1,Bit8u op2) { 01107 if (!op2) return op1; 01108 lf_var2b=op2; 01109 lf_var1d=op1; 01110 if (lf_var1d & 0x80000000) { 01111 lf_resd=(lf_var1d >> lf_var2b) | (0xffffffff << (32 - lf_var2b)); 01112 } else { 01113 lf_resd=lf_var1d >> lf_var2b; 01114 } 01115 lflags.type=t_SARd; 01116 return lf_resd; 01117 } 01118 01119 static Bit32u DRC_CALL_CONV dynrec_sar_dword_simple(Bit32u op1,Bit8u op2) DRC_FC; 01120 static Bit32u DRC_CALL_CONV dynrec_sar_dword_simple(Bit32u op1,Bit8u op2) { 01121 if (!op2) return op1; 01122 if (op1 & 0x80000000) return (op1 >> op2) | (0xffffffff << (32 - op2)); 01123 else return op1 >> op2; 01124 } 01125 01126 static void dyn_shift_byte_gencall(ShiftOps op) { 01127 switch (op) { 01128 case SHIFT_ROL: 01129 InvalidateFlagsPartially(dynrec_rol_byte_simple,t_ROLb); 01130 gen_call_function_raw(dynrec_rol_byte); 01131 break; 01132 case SHIFT_ROR: 01133 InvalidateFlagsPartially(dynrec_ror_byte_simple,t_RORb); 01134 gen_call_function_raw(dynrec_ror_byte); 01135 break; 01136 case SHIFT_RCL: 01137 AcquireFlags(FLAG_CF); 01138 gen_call_function_raw(dynrec_rcl_byte); 01139 break; 01140 case SHIFT_RCR: 01141 AcquireFlags(FLAG_CF); 01142 gen_call_function_raw(dynrec_rcr_byte); 01143 break; 01144 case SHIFT_SHL: 01145 case SHIFT_SAL: 01146 InvalidateFlagsPartially(dynrec_shl_byte_simple,t_SHLb); 01147 gen_call_function_raw(dynrec_shl_byte); 01148 break; 01149 case SHIFT_SHR: 01150 InvalidateFlagsPartially(dynrec_shr_byte_simple,t_SHRb); 01151 gen_call_function_raw(dynrec_shr_byte); 01152 break; 01153 case SHIFT_SAR: 01154 InvalidateFlagsPartially(dynrec_sar_byte_simple,t_SARb); 01155 gen_call_function_raw(dynrec_sar_byte); 01156 break; 01157 default: IllegalOptionDynrec("dyn_shift_byte_gencall"); 01158 } 01159 } 01160 01161 static void dyn_shift_word_gencall(ShiftOps op,bool dword) { 01162 if (dword) { 01163 switch (op) { 01164 case SHIFT_ROL: 01165 InvalidateFlagsPartially(dynrec_rol_dword_simple,t_ROLd); 01166 gen_call_function_raw(dynrec_rol_dword); 01167 break; 01168 case SHIFT_ROR: 01169 InvalidateFlagsPartially(dynrec_ror_dword_simple,t_RORd); 01170 gen_call_function_raw(dynrec_ror_dword); 01171 break; 01172 case SHIFT_RCL: 01173 AcquireFlags(FLAG_CF); 01174 gen_call_function_raw(dynrec_rcl_dword); 01175 break; 01176 case SHIFT_RCR: 01177 AcquireFlags(FLAG_CF); 01178 gen_call_function_raw(dynrec_rcr_dword); 01179 break; 01180 case SHIFT_SHL: 01181 case SHIFT_SAL: 01182 InvalidateFlagsPartially(dynrec_shl_dword_simple,t_SHLd); 01183 gen_call_function_raw(dynrec_shl_dword); 01184 break; 01185 case SHIFT_SHR: 01186 InvalidateFlagsPartially(dynrec_shr_dword_simple,t_SHRd); 01187 gen_call_function_raw(dynrec_shr_dword); 01188 break; 01189 case SHIFT_SAR: 01190 InvalidateFlagsPartially(dynrec_sar_dword_simple,t_SARd); 01191 gen_call_function_raw(dynrec_sar_dword); 01192 break; 01193 default: IllegalOptionDynrec("dyn_shift_dword_gencall"); 01194 } 01195 } else { 01196 switch (op) { 01197 case SHIFT_ROL: 01198 InvalidateFlagsPartially(dynrec_rol_word_simple,t_ROLw); 01199 gen_call_function_raw(dynrec_rol_word); 01200 break; 01201 case SHIFT_ROR: 01202 InvalidateFlagsPartially(dynrec_ror_word_simple,t_RORw); 01203 gen_call_function_raw(dynrec_ror_word); 01204 break; 01205 case SHIFT_RCL: 01206 AcquireFlags(FLAG_CF); 01207 gen_call_function_raw(dynrec_rcl_word); 01208 break; 01209 case SHIFT_RCR: 01210 AcquireFlags(FLAG_CF); 01211 gen_call_function_raw(dynrec_rcr_word); 01212 break; 01213 case SHIFT_SHL: 01214 case SHIFT_SAL: 01215 InvalidateFlagsPartially(dynrec_shl_word_simple,t_SHLw); 01216 gen_call_function_raw(dynrec_shl_word); 01217 break; 01218 case SHIFT_SHR: 01219 InvalidateFlagsPartially(dynrec_shr_word_simple,t_SHRw); 01220 gen_call_function_raw(dynrec_shr_word); 01221 break; 01222 case SHIFT_SAR: 01223 InvalidateFlagsPartially(dynrec_sar_word_simple,t_SARw); 01224 gen_call_function_raw(dynrec_sar_word); 01225 break; 01226 default: IllegalOptionDynrec("dyn_shift_word_gencall"); 01227 } 01228 } 01229 } 01230 01231 static Bit16u DRC_CALL_CONV dynrec_dshl_word(Bit16u op1,Bit16u op2,Bit8u op3) DRC_FC; 01232 static Bit16u DRC_CALL_CONV dynrec_dshl_word(Bit16u op1,Bit16u op2,Bit8u op3) { 01233 Bit8u val=op3 & 0x1f; 01234 if (!val) return op1; 01235 lf_var2b=val; 01236 lf_var1d=(op1<<16)|op2; 01237 Bit32u tempd=lf_var1d << lf_var2b; 01238 if (lf_var2b>16) tempd |= (op2 << (lf_var2b - 16)); 01239 lf_resw=(Bit16u)(tempd >> 16); 01240 lflags.type=t_DSHLw; 01241 return lf_resw; 01242 } 01243 01244 static Bit16u DRC_CALL_CONV dynrec_dshl_word_simple(Bit16u op1,Bit16u op2,Bit8u op3) DRC_FC; 01245 static Bit16u DRC_CALL_CONV dynrec_dshl_word_simple(Bit16u op1,Bit16u op2,Bit8u op3) { 01246 Bit8u val=op3 & 0x1f; 01247 if (!val) return op1; 01248 Bit32u tempd=(Bit32u)((((Bit32u)op1)<<16)|op2) << val; 01249 if (val>16) tempd |= (op2 << (val - 16)); 01250 return (Bit16u)(tempd >> 16); 01251 } 01252 01253 static Bit32u DRC_CALL_CONV dynrec_dshl_dword(Bit32u op1,Bit32u op2,Bit8u op3) DRC_FC; 01254 static Bit32u DRC_CALL_CONV dynrec_dshl_dword(Bit32u op1,Bit32u op2,Bit8u op3) { 01255 Bit8u val=op3 & 0x1f; 01256 if (!val) return op1; 01257 lf_var2b=val; 01258 lf_var1d=op1; 01259 lf_resd=(lf_var1d << lf_var2b) | (op2 >> (32-lf_var2b)); 01260 lflags.type=t_DSHLd; 01261 return lf_resd; 01262 } 01263 01264 static Bit32u DRC_CALL_CONV dynrec_dshl_dword_simple(Bit32u op1,Bit32u op2,Bit8u op3) DRC_FC; 01265 static Bit32u DRC_CALL_CONV dynrec_dshl_dword_simple(Bit32u op1,Bit32u op2,Bit8u op3) { 01266 Bit8u val=op3 & 0x1f; 01267 if (!val) return op1; 01268 return (op1 << val) | (op2 >> (32-val)); 01269 } 01270 01271 static Bit16u DRC_CALL_CONV dynrec_dshr_word(Bit16u op1,Bit16u op2,Bit8u op3) DRC_FC; 01272 static Bit16u DRC_CALL_CONV dynrec_dshr_word(Bit16u op1,Bit16u op2,Bit8u op3) { 01273 Bit8u val=op3 & 0x1f; 01274 if (!val) return op1; 01275 lf_var2b=val; 01276 lf_var1d=(op2<<16)|op1; 01277 Bit32u tempd=lf_var1d >> lf_var2b; 01278 if (lf_var2b>16) tempd |= (op2 << (32-lf_var2b )); 01279 lf_resw=(Bit16u)(tempd); 01280 lflags.type=t_DSHRw; 01281 return lf_resw; 01282 } 01283 01284 static Bit16u DRC_CALL_CONV dynrec_dshr_word_simple(Bit16u op1,Bit16u op2,Bit8u op3) DRC_FC; 01285 static Bit16u DRC_CALL_CONV dynrec_dshr_word_simple(Bit16u op1,Bit16u op2,Bit8u op3) { 01286 Bit8u val=op3 & 0x1f; 01287 if (!val) return op1; 01288 Bit32u tempd=(Bit32u)((((Bit32u)op2)<<16)|op1) >> val; 01289 if (val>16) tempd |= (op2 << (32-val)); 01290 return (Bit16u)(tempd); 01291 } 01292 01293 static Bit32u DRC_CALL_CONV dynrec_dshr_dword(Bit32u op1,Bit32u op2,Bit8u op3) DRC_FC; 01294 static Bit32u DRC_CALL_CONV dynrec_dshr_dword(Bit32u op1,Bit32u op2,Bit8u op3) { 01295 Bit8u val=op3 & 0x1f; 01296 if (!val) return op1; 01297 lf_var2b=val; 01298 lf_var1d=op1; 01299 lf_resd=(lf_var1d >> lf_var2b) | (op2 << (32-lf_var2b)); 01300 lflags.type=t_DSHRd; 01301 return lf_resd; 01302 } 01303 01304 static Bit32u DRC_CALL_CONV dynrec_dshr_dword_simple(Bit32u op1,Bit32u op2,Bit8u op3) DRC_FC; 01305 static Bit32u DRC_CALL_CONV dynrec_dshr_dword_simple(Bit32u op1,Bit32u op2,Bit8u op3) { 01306 Bit8u val=op3 & 0x1f; 01307 if (!val) return op1; 01308 return (op1 >> val) | (op2 << (32-val)); 01309 } 01310 01311 static void dyn_dpshift_word_gencall(bool left) { 01312 if (left) { 01313 DRC_PTR_SIZE_IM proc_addr=gen_call_function_R3(dynrec_dshl_word,FC_OP3); 01314 InvalidateFlagsPartially(dynrec_dshl_word_simple,proc_addr,t_DSHLw); 01315 } else { 01316 DRC_PTR_SIZE_IM proc_addr=gen_call_function_R3(dynrec_dshr_word,FC_OP3); 01317 InvalidateFlagsPartially(dynrec_dshr_word_simple,proc_addr,t_DSHRw); 01318 } 01319 } 01320 01321 static void dyn_dpshift_dword_gencall(bool left) { 01322 if (left) { 01323 DRC_PTR_SIZE_IM proc_addr=gen_call_function_R3(dynrec_dshl_dword,FC_OP3); 01324 InvalidateFlagsPartially(dynrec_dshl_dword_simple,proc_addr,t_DSHLd); 01325 } else { 01326 DRC_PTR_SIZE_IM proc_addr=gen_call_function_R3(dynrec_dshr_dword,FC_OP3); 01327 InvalidateFlagsPartially(dynrec_dshr_dword_simple,proc_addr,t_DSHRd); 01328 } 01329 } 01330 01331 01332 01333 static Bit32u DRC_CALL_CONV dynrec_get_of(void) DRC_FC; 01334 static Bit32u DRC_CALL_CONV dynrec_get_of(void) { return TFLG_O; } 01335 static Bit32u DRC_CALL_CONV dynrec_get_nof(void) DRC_FC; 01336 static Bit32u DRC_CALL_CONV dynrec_get_nof(void) { return TFLG_NO; } 01337 static Bit32u DRC_CALL_CONV dynrec_get_cf(void) DRC_FC; 01338 static Bit32u DRC_CALL_CONV dynrec_get_cf(void) { return TFLG_B; } 01339 static Bit32u DRC_CALL_CONV dynrec_get_ncf(void) DRC_FC; 01340 static Bit32u DRC_CALL_CONV dynrec_get_ncf(void) { return TFLG_NB; } 01341 static Bit32u DRC_CALL_CONV dynrec_get_zf(void) DRC_FC; 01342 static Bit32u DRC_CALL_CONV dynrec_get_zf(void) { return TFLG_Z; } 01343 static Bit32u DRC_CALL_CONV dynrec_get_nzf(void) DRC_FC; 01344 static Bit32u DRC_CALL_CONV dynrec_get_nzf(void) { return TFLG_NZ; } 01345 static Bit32u DRC_CALL_CONV dynrec_get_sf(void) DRC_FC; 01346 static Bit32u DRC_CALL_CONV dynrec_get_sf(void) { return TFLG_S; } 01347 static Bit32u DRC_CALL_CONV dynrec_get_nsf(void) DRC_FC; 01348 static Bit32u DRC_CALL_CONV dynrec_get_nsf(void) { return TFLG_NS; } 01349 static Bit32u DRC_CALL_CONV dynrec_get_pf(void) DRC_FC; 01350 static Bit32u DRC_CALL_CONV dynrec_get_pf(void) { return TFLG_P; } 01351 static Bit32u DRC_CALL_CONV dynrec_get_npf(void) DRC_FC; 01352 static Bit32u DRC_CALL_CONV dynrec_get_npf(void) { return TFLG_NP; } 01353 01354 static Bit32u DRC_CALL_CONV dynrec_get_cf_or_zf(void) DRC_FC; 01355 static Bit32u DRC_CALL_CONV dynrec_get_cf_or_zf(void) { return TFLG_BE; } 01356 static Bit32u DRC_CALL_CONV dynrec_get_ncf_and_nzf(void) DRC_FC; 01357 static Bit32u DRC_CALL_CONV dynrec_get_ncf_and_nzf(void) { return TFLG_NBE; } 01358 static Bit32u DRC_CALL_CONV dynrec_get_sf_neq_of(void) DRC_FC; 01359 static Bit32u DRC_CALL_CONV dynrec_get_sf_neq_of(void) { return TFLG_L; } 01360 static Bit32u DRC_CALL_CONV dynrec_get_sf_eq_of(void) DRC_FC; 01361 static Bit32u DRC_CALL_CONV dynrec_get_sf_eq_of(void) { return TFLG_NL; } 01362 static Bit32u DRC_CALL_CONV dynrec_get_zf_or_sf_neq_of(void) DRC_FC; 01363 static Bit32u DRC_CALL_CONV dynrec_get_zf_or_sf_neq_of(void) { return TFLG_LE; } 01364 static Bit32u DRC_CALL_CONV dynrec_get_nzf_and_sf_eq_of(void) DRC_FC; 01365 static Bit32u DRC_CALL_CONV dynrec_get_nzf_and_sf_eq_of(void) { return TFLG_NLE; } 01366 01367 01368 static void dyn_branchflag_to_reg(BranchTypes btype) { 01369 switch (btype) { 01370 case BR_O:gen_call_function_raw(dynrec_get_of);break; 01371 case BR_NO:gen_call_function_raw(dynrec_get_nof);break; 01372 case BR_B:gen_call_function_raw(dynrec_get_cf);break; 01373 case BR_NB:gen_call_function_raw(dynrec_get_ncf);break; 01374 case BR_Z:gen_call_function_raw(dynrec_get_zf);break; 01375 case BR_NZ:gen_call_function_raw(dynrec_get_nzf);break; 01376 case BR_BE:gen_call_function_raw(dynrec_get_cf_or_zf);break; 01377 case BR_NBE:gen_call_function_raw(dynrec_get_ncf_and_nzf);break; 01378 01379 case BR_S:gen_call_function_raw(dynrec_get_sf);break; 01380 case BR_NS:gen_call_function_raw(dynrec_get_nsf);break; 01381 case BR_P:gen_call_function_raw(dynrec_get_pf);break; 01382 case BR_NP:gen_call_function_raw(dynrec_get_npf);break; 01383 case BR_L:gen_call_function_raw(dynrec_get_sf_neq_of);break; 01384 case BR_NL:gen_call_function_raw(dynrec_get_sf_eq_of);break; 01385 case BR_LE:gen_call_function_raw(dynrec_get_zf_or_sf_neq_of);break; 01386 case BR_NLE:gen_call_function_raw(dynrec_get_nzf_and_sf_eq_of);break; 01387 } 01388 } 01389 01390 01391 static void DRC_CALL_CONV dynrec_mul_byte(Bit8u op) DRC_FC; 01392 static void DRC_CALL_CONV dynrec_mul_byte(Bit8u op) { 01393 FillFlagsNoCFOF(); 01394 reg_ax=reg_al*op; 01395 SETFLAGBIT(ZF,reg_al == 0); 01396 if (reg_ax & 0xff00) { 01397 SETFLAGBIT(CF,true); 01398 SETFLAGBIT(OF,true); 01399 } else { 01400 SETFLAGBIT(CF,false); 01401 SETFLAGBIT(OF,false); 01402 } 01403 } 01404 01405 static void DRC_CALL_CONV dynrec_imul_byte(Bit8u op) DRC_FC; 01406 static void DRC_CALL_CONV dynrec_imul_byte(Bit8u op) { 01407 FillFlagsNoCFOF(); 01408 reg_ax=((Bit8s)reg_al) * ((Bit8s)op); 01409 if ((reg_ax & 0xff80)==0xff80 || (reg_ax & 0xff80)==0x0000) { 01410 SETFLAGBIT(CF,false); 01411 SETFLAGBIT(OF,false); 01412 } else { 01413 SETFLAGBIT(CF,true); 01414 SETFLAGBIT(OF,true); 01415 } 01416 } 01417 01418 static void DRC_CALL_CONV dynrec_mul_word(Bit16u op) DRC_FC; 01419 static void DRC_CALL_CONV dynrec_mul_word(Bit16u op) { 01420 FillFlagsNoCFOF(); 01421 Bitu tempu=(Bitu)reg_ax*(Bitu)op; 01422 reg_ax=(Bit16u)(tempu); 01423 reg_dx=(Bit16u)(tempu >> 16); 01424 SETFLAGBIT(ZF,reg_ax == 0); 01425 if (reg_dx) { 01426 SETFLAGBIT(CF,true); 01427 SETFLAGBIT(OF,true); 01428 } else { 01429 SETFLAGBIT(CF,false); 01430 SETFLAGBIT(OF,false); 01431 } 01432 } 01433 01434 static void DRC_CALL_CONV dynrec_imul_word(Bit16u op) DRC_FC; 01435 static void DRC_CALL_CONV dynrec_imul_word(Bit16u op) { 01436 FillFlagsNoCFOF(); 01437 Bits temps=Bits((Bit16s)reg_ax)*Bits((Bit16s)op); 01438 reg_ax=(Bit16s)(temps); 01439 reg_dx=(Bit16s)(temps >> 16); 01440 if (((temps & 0xffff8000)==0xffff8000 || (temps & 0xffff8000)==0x0000)) { 01441 SETFLAGBIT(CF,false); 01442 SETFLAGBIT(OF,false); 01443 } else { 01444 SETFLAGBIT(CF,true); 01445 SETFLAGBIT(OF,true); 01446 } 01447 } 01448 01449 static void DRC_CALL_CONV dynrec_mul_dword(Bit32u op) DRC_FC; 01450 static void DRC_CALL_CONV dynrec_mul_dword(Bit32u op) { 01451 FillFlagsNoCFOF(); 01452 Bit64u tempu=(Bit64u)reg_eax*(Bit64u)op; 01453 reg_eax=(Bit32u)(tempu); 01454 reg_edx=(Bit32u)(tempu >> 32); 01455 SETFLAGBIT(ZF,reg_eax == 0); 01456 if (reg_edx) { 01457 SETFLAGBIT(CF,true); 01458 SETFLAGBIT(OF,true); 01459 } else { 01460 SETFLAGBIT(CF,false); 01461 SETFLAGBIT(OF,false); 01462 } 01463 } 01464 01465 static void DRC_CALL_CONV dynrec_imul_dword(Bit32u op) DRC_FC; 01466 static void DRC_CALL_CONV dynrec_imul_dword(Bit32u op) { 01467 FillFlagsNoCFOF(); 01468 Bit64s temps=((Bit64s)((Bit32s)reg_eax))*((Bit64s)((Bit32s)op)); 01469 reg_eax=(Bit32u)(temps); 01470 reg_edx=(Bit32u)(temps >> 32); 01471 if ((reg_edx==0xffffffff) && (reg_eax & 0x80000000) ) { 01472 SETFLAGBIT(CF,false); 01473 SETFLAGBIT(OF,false); 01474 } else if ( (reg_edx==0x00000000) && (reg_eax< 0x80000000) ) { 01475 SETFLAGBIT(CF,false); 01476 SETFLAGBIT(OF,false); 01477 } else { 01478 SETFLAGBIT(CF,true); 01479 SETFLAGBIT(OF,true); 01480 } 01481 } 01482 01483 01484 static bool DRC_CALL_CONV dynrec_div_byte(Bit8u op) DRC_FC; 01485 static bool DRC_CALL_CONV dynrec_div_byte(Bit8u op) { 01486 Bitu val=op; 01487 if (val==0) return CPU_PrepareException(0,0); 01488 Bitu quo=reg_ax / val; 01489 Bit8u rem=(Bit8u)(reg_ax % val); 01490 Bit8u quo8=(Bit8u)(quo&0xff); 01491 if (quo>0xff) return CPU_PrepareException(0,0); 01492 reg_ah=rem; 01493 reg_al=quo8; 01494 return false; 01495 } 01496 01497 static bool DRC_CALL_CONV dynrec_idiv_byte(Bit8u op) DRC_FC; 01498 static bool DRC_CALL_CONV dynrec_idiv_byte(Bit8u op) { 01499 Bits val=(Bit8s)op; 01500 if (val==0) return CPU_PrepareException(0,0); 01501 Bits quo=((Bit16s)reg_ax) / val; 01502 Bit8s rem=(Bit8s)((Bit16s)reg_ax % val); 01503 Bit8s quo8s=(Bit8s)(quo&0xff); 01504 if (quo!=(Bit16s)quo8s) return CPU_PrepareException(0,0); 01505 reg_ah=rem; 01506 reg_al=quo8s; 01507 return false; 01508 } 01509 01510 static bool DRC_CALL_CONV dynrec_div_word(Bit16u op) DRC_FC; 01511 static bool DRC_CALL_CONV dynrec_div_word(Bit16u op) { 01512 Bitu val=op; 01513 if (val==0) return CPU_PrepareException(0,0); 01514 Bitu num=((Bit32u)reg_dx<<16)|reg_ax; 01515 Bitu quo=num/val; 01516 Bit16u rem=(Bit16u)(num % val); 01517 Bit16u quo16=(Bit16u)(quo&0xffff); 01518 if (quo!=(Bit32u)quo16) return CPU_PrepareException(0,0); 01519 reg_dx=rem; 01520 reg_ax=quo16; 01521 return false; 01522 } 01523 01524 static bool DRC_CALL_CONV dynrec_idiv_word(Bit16u op) DRC_FC; 01525 static bool DRC_CALL_CONV dynrec_idiv_word(Bit16u op) { 01526 Bits val=(Bit16s)op; 01527 if (val==0) return CPU_PrepareException(0,0); 01528 Bits num=(Bit32s)((reg_dx<<16)|reg_ax); 01529 Bits quo=num/val; 01530 Bit16s rem=(Bit16s)(num % val); 01531 Bit16s quo16s=(Bit16s)quo; 01532 if (quo!=(Bit32s)quo16s) return CPU_PrepareException(0,0); 01533 reg_dx=rem; 01534 reg_ax=quo16s; 01535 return false; 01536 } 01537 01538 static bool DRC_CALL_CONV dynrec_div_dword(Bit32u op) DRC_FC; 01539 static bool DRC_CALL_CONV dynrec_div_dword(Bit32u op) { 01540 Bitu val=op; 01541 if (val==0) return CPU_PrepareException(0,0); 01542 Bit64u num=(((Bit64u)reg_edx)<<32)|reg_eax; 01543 Bit64u quo=num/val; 01544 Bit32u rem=(Bit32u)(num % val); 01545 Bit32u quo32=(Bit32u)(quo&0xffffffff); 01546 if (quo!=(Bit64u)quo32) return CPU_PrepareException(0,0); 01547 reg_edx=rem; 01548 reg_eax=quo32; 01549 return false; 01550 } 01551 01552 static bool DRC_CALL_CONV dynrec_idiv_dword(Bit32u op) DRC_FC; 01553 static bool DRC_CALL_CONV dynrec_idiv_dword(Bit32u op) { 01554 Bits val=(Bit32s)op; 01555 if (val==0) return CPU_PrepareException(0,0); 01556 Bit64s num=(((Bit64u)reg_edx)<<32)|reg_eax; 01557 Bit64s quo=num/val; 01558 Bit32s rem=(Bit32s)(num % val); 01559 Bit32s quo32s=(Bit32s)(quo&0xffffffff); 01560 if (quo!=(Bit64s)quo32s) return CPU_PrepareException(0,0); 01561 reg_edx=rem; 01562 reg_eax=quo32s; 01563 return false; 01564 } 01565 01566 01567 static Bit16u DRC_CALL_CONV dynrec_dimul_word(Bit16u op1,Bit16u op2) DRC_FC; 01568 static Bit16u DRC_CALL_CONV dynrec_dimul_word(Bit16u op1,Bit16u op2) { 01569 FillFlagsNoCFOF(); 01570 Bits res=Bits((Bit16s)op1) * Bits((Bit16s)op2); 01571 if ((res>-32768) && (res<32767)) { 01572 SETFLAGBIT(CF,false); 01573 SETFLAGBIT(OF,false); 01574 } else { 01575 SETFLAGBIT(CF,true); 01576 SETFLAGBIT(OF,true); 01577 } 01578 return (Bit16u)(res & 0xffff); 01579 } 01580 01581 static Bit32u DRC_CALL_CONV dynrec_dimul_dword(Bit32u op1,Bit32u op2) DRC_FC; 01582 static Bit32u DRC_CALL_CONV dynrec_dimul_dword(Bit32u op1,Bit32u op2) { 01583 FillFlagsNoCFOF(); 01584 Bit64s res=((Bit64s)((Bit32s)op1))*((Bit64s)((Bit32s)op2)); 01585 if ((res>-((Bit64s)(2147483647)+1)) && (res<(Bit64s)2147483647)) { 01586 SETFLAGBIT(CF,false); 01587 SETFLAGBIT(OF,false); 01588 } else { 01589 SETFLAGBIT(CF,true); 01590 SETFLAGBIT(OF,true); 01591 } 01592 return (Bit32s)res; 01593 } 01594 01595 01596 01597 static Bit16u DRC_CALL_CONV dynrec_cbw(Bit8u op) DRC_FC; 01598 static Bit16u DRC_CALL_CONV dynrec_cbw(Bit8u op) { 01599 return (Bit8s)op; 01600 } 01601 01602 static Bit32u DRC_CALL_CONV dynrec_cwde(Bit16u op) DRC_FC; 01603 static Bit32u DRC_CALL_CONV dynrec_cwde(Bit16u op) { 01604 return (Bit16s)op; 01605 } 01606 01607 static Bit16u DRC_CALL_CONV dynrec_cwd(Bit16u op) DRC_FC; 01608 static Bit16u DRC_CALL_CONV dynrec_cwd(Bit16u op) { 01609 if (op & 0x8000) return 0xffff; 01610 else return 0; 01611 } 01612 01613 static Bit32u DRC_CALL_CONV dynrec_cdq(Bit32u op) DRC_FC; 01614 static Bit32u DRC_CALL_CONV dynrec_cdq(Bit32u op) { 01615 if (op & 0x80000000) return 0xffffffff; 01616 else return 0; 01617 } 01618 01619 01620 static void DRC_CALL_CONV dynrec_sahf(Bit16u op) DRC_FC; 01621 static void DRC_CALL_CONV dynrec_sahf(Bit16u op) { 01622 SETFLAGBIT(OF,get_OF()); 01623 lflags.type=t_UNKNOWN; 01624 CPU_SetFlags(op>>8,FMASK_NORMAL & 0xff); 01625 } 01626 01627 01628 static void DRC_CALL_CONV dynrec_cmc(void) DRC_FC; 01629 static void DRC_CALL_CONV dynrec_cmc(void) { 01630 FillFlags(); 01631 SETFLAGBIT(CF,!(reg_flags & FLAG_CF)); 01632 } 01633 static void DRC_CALL_CONV dynrec_clc(void) DRC_FC; 01634 static void DRC_CALL_CONV dynrec_clc(void) { 01635 FillFlags(); 01636 SETFLAGBIT(CF,false); 01637 } 01638 static void DRC_CALL_CONV dynrec_stc(void) DRC_FC; 01639 static void DRC_CALL_CONV dynrec_stc(void) { 01640 FillFlags(); 01641 SETFLAGBIT(CF,true); 01642 } 01643 static void DRC_CALL_CONV dynrec_cld(void) DRC_FC; 01644 static void DRC_CALL_CONV dynrec_cld(void) { 01645 SETFLAGBIT(DF,false); 01646 cpu.direction=1; 01647 } 01648 static void DRC_CALL_CONV dynrec_std(void) DRC_FC; 01649 static void DRC_CALL_CONV dynrec_std(void) { 01650 SETFLAGBIT(DF,true); 01651 cpu.direction=-1; 01652 } 01653 01654 01655 static Bit16u DRC_CALL_CONV dynrec_movsb_word(Bit16u count,Bit16s add_index,PhysPt si_base,PhysPt di_base) DRC_FC; 01656 static Bit16u DRC_CALL_CONV dynrec_movsb_word(Bit16u count,Bit16s add_index,PhysPt si_base,PhysPt di_base) { 01657 Bit16u count_left; 01658 if (count<(Bitu)CPU_Cycles) { 01659 count_left=0; 01660 } else { 01661 count_left=(Bit16u)(count-CPU_Cycles); 01662 count=(Bit16u)CPU_Cycles; 01663 CPU_Cycles=0; 01664 } 01665 for (;count>0;count--) { 01666 mem_writeb(di_base+reg_di,mem_readb(si_base+reg_si)); 01667 reg_si+=add_index; 01668 reg_di+=add_index; 01669 } 01670 return count_left; 01671 } 01672 01673 static Bit32u DRC_CALL_CONV dynrec_movsb_dword(Bit32u count,Bit32s add_index,PhysPt si_base,PhysPt di_base) DRC_FC; 01674 static Bit32u DRC_CALL_CONV dynrec_movsb_dword(Bit32u count,Bit32s add_index,PhysPt si_base,PhysPt di_base) { 01675 Bit32u count_left; 01676 if (count<(Bitu)CPU_Cycles) { 01677 count_left=0; 01678 } else { 01679 count_left= (Bit32u)(count-CPU_Cycles); 01680 count= (Bit32u)CPU_Cycles; 01681 CPU_Cycles=0; 01682 } 01683 for (;count>0;count--) { 01684 mem_writeb(di_base+reg_edi,mem_readb(si_base+reg_esi)); 01685 reg_esi+=add_index; 01686 reg_edi+=add_index; 01687 } 01688 return count_left; 01689 } 01690 01691 static Bit16u DRC_CALL_CONV dynrec_movsw_word(Bit16u count,Bit16s add_index,PhysPt si_base,PhysPt di_base) DRC_FC; 01692 static Bit16u DRC_CALL_CONV dynrec_movsw_word(Bit16u count,Bit16s add_index,PhysPt si_base,PhysPt di_base) { 01693 Bit16u count_left; 01694 if (count<(Bitu)CPU_Cycles) { 01695 count_left=0; 01696 } else { 01697 count_left=(Bit16u)(count-CPU_Cycles); 01698 count=(Bit16u)CPU_Cycles; 01699 CPU_Cycles=0; 01700 } 01701 add_index<<=1; 01702 for (;count>0;count--) { 01703 mem_writew(di_base+reg_di,mem_readw(si_base+reg_si)); 01704 reg_si+=add_index; 01705 reg_di+=add_index; 01706 } 01707 return count_left; 01708 } 01709 01710 static Bit32u DRC_CALL_CONV dynrec_movsw_dword(Bit32u count,Bit32s add_index,PhysPt si_base,PhysPt di_base) DRC_FC; 01711 static Bit32u DRC_CALL_CONV dynrec_movsw_dword(Bit32u count,Bit32s add_index,PhysPt si_base,PhysPt di_base) { 01712 Bit32u count_left; 01713 if (count<(Bitu)CPU_Cycles) { 01714 count_left=0; 01715 } else { 01716 count_left= (Bit32u)(count-CPU_Cycles); 01717 count= (Bit32u)CPU_Cycles; 01718 CPU_Cycles=0; 01719 } 01720 add_index<<=1; 01721 for (;count>0;count--) { 01722 mem_writew(di_base+reg_edi,mem_readw(si_base+reg_esi)); 01723 reg_esi+=add_index; 01724 reg_edi+=add_index; 01725 } 01726 return count_left; 01727 } 01728 01729 static Bit16u DRC_CALL_CONV dynrec_movsd_word(Bit16u count,Bit16s add_index,PhysPt si_base,PhysPt di_base) DRC_FC; 01730 static Bit16u DRC_CALL_CONV dynrec_movsd_word(Bit16u count,Bit16s add_index,PhysPt si_base,PhysPt di_base) { 01731 Bit16u count_left; 01732 if (count<(Bitu)CPU_Cycles) { 01733 count_left=0; 01734 } else { 01735 count_left=(Bit16u)(count-CPU_Cycles); 01736 count=(Bit16u)CPU_Cycles; 01737 CPU_Cycles=0; 01738 } 01739 add_index<<=2; 01740 for (;count>0;count--) { 01741 mem_writed(di_base+reg_di,mem_readd(si_base+reg_si)); 01742 reg_si+=add_index; 01743 reg_di+=add_index; 01744 } 01745 return count_left; 01746 } 01747 01748 static Bit32u DRC_CALL_CONV dynrec_movsd_dword(Bit32u count,Bit32s add_index,PhysPt si_base,PhysPt di_base) DRC_FC; 01749 static Bit32u DRC_CALL_CONV dynrec_movsd_dword(Bit32u count,Bit32s add_index,PhysPt si_base,PhysPt di_base) { 01750 Bit32u count_left; 01751 if (count<(Bitu)CPU_Cycles) { 01752 count_left=0; 01753 } else { 01754 count_left= (Bit32u)(count - CPU_Cycles); 01755 count= (Bit32u)CPU_Cycles; 01756 CPU_Cycles=0; 01757 } 01758 add_index<<=2; 01759 for (;count>0;count--) { 01760 mem_writed(di_base+reg_edi,mem_readd(si_base+reg_esi)); 01761 reg_esi+=add_index; 01762 reg_edi+=add_index; 01763 } 01764 return count_left; 01765 } 01766 01767 01768 static Bit16u DRC_CALL_CONV dynrec_lodsb_word(Bit16u count,Bit16s add_index,PhysPt si_base) DRC_FC; 01769 static Bit16u DRC_CALL_CONV dynrec_lodsb_word(Bit16u count,Bit16s add_index,PhysPt si_base) { 01770 Bit16u count_left; 01771 if (count<(Bitu)CPU_Cycles) { 01772 count_left=0; 01773 } else { 01774 count_left=(Bit16u)(count-CPU_Cycles); 01775 count=(Bit16u)CPU_Cycles; 01776 CPU_Cycles=0; 01777 } 01778 for (;count>0;count--) { 01779 reg_al=mem_readb(si_base+reg_si); 01780 reg_si+=add_index; 01781 } 01782 return count_left; 01783 } 01784 01785 static Bit32u DRC_CALL_CONV dynrec_lodsb_dword(Bit32u count,Bit32s add_index,PhysPt si_base) DRC_FC; 01786 static Bit32u DRC_CALL_CONV dynrec_lodsb_dword(Bit32u count,Bit32s add_index,PhysPt si_base) { 01787 Bit32u count_left; 01788 if (count<(Bitu)CPU_Cycles) { 01789 count_left=0; 01790 } else { 01791 count_left= (Bit32u)(count - CPU_Cycles); 01792 count= (Bit32u)CPU_Cycles; 01793 CPU_Cycles=0; 01794 } 01795 for (;count>0;count--) { 01796 reg_al=mem_readb(si_base+reg_esi); 01797 reg_esi+=add_index; 01798 } 01799 return count_left; 01800 } 01801 01802 static Bit16u DRC_CALL_CONV dynrec_lodsw_word(Bit16u count,Bit16s add_index,PhysPt si_base) DRC_FC; 01803 static Bit16u DRC_CALL_CONV dynrec_lodsw_word(Bit16u count,Bit16s add_index,PhysPt si_base) { 01804 Bit16u count_left; 01805 if (count<(Bitu)CPU_Cycles) { 01806 count_left=0; 01807 } else { 01808 count_left=(Bit16u)(count-CPU_Cycles); 01809 count=(Bit16u)CPU_Cycles; 01810 CPU_Cycles=0; 01811 } 01812 add_index<<=1; 01813 for (;count>0;count--) { 01814 reg_ax=mem_readw(si_base+reg_si); 01815 reg_si+=add_index; 01816 } 01817 return count_left; 01818 } 01819 01820 static Bit32u DRC_CALL_CONV dynrec_lodsw_dword(Bit32u count,Bit32s add_index,PhysPt si_base) DRC_FC; 01821 static Bit32u DRC_CALL_CONV dynrec_lodsw_dword(Bit32u count,Bit32s add_index,PhysPt si_base) { 01822 Bit32u count_left; 01823 if (count<(Bitu)CPU_Cycles) { 01824 count_left=0; 01825 } else { 01826 count_left= (Bit32u)(count - CPU_Cycles); 01827 count= (Bit32u)CPU_Cycles; 01828 CPU_Cycles=0; 01829 } 01830 add_index<<=1; 01831 for (;count>0;count--) { 01832 reg_ax=mem_readw(si_base+reg_esi); 01833 reg_esi+=add_index; 01834 } 01835 return count_left; 01836 } 01837 01838 static Bit16u DRC_CALL_CONV dynrec_lodsd_word(Bit16u count,Bit16s add_index,PhysPt si_base) DRC_FC; 01839 static Bit16u DRC_CALL_CONV dynrec_lodsd_word(Bit16u count,Bit16s add_index,PhysPt si_base) { 01840 Bit16u count_left; 01841 if (count<(Bitu)CPU_Cycles) { 01842 count_left=0; 01843 } else { 01844 count_left=(Bit16u)(count-CPU_Cycles); 01845 count=(Bit16u)CPU_Cycles; 01846 CPU_Cycles=0; 01847 } 01848 add_index<<=2; 01849 for (;count>0;count--) { 01850 reg_eax=mem_readd(si_base+reg_si); 01851 reg_si+=add_index; 01852 } 01853 return count_left; 01854 } 01855 01856 static Bit32u DRC_CALL_CONV dynrec_lodsd_dword(Bit32u count,Bit32s add_index,PhysPt si_base) DRC_FC; 01857 static Bit32u DRC_CALL_CONV dynrec_lodsd_dword(Bit32u count,Bit32s add_index,PhysPt si_base) { 01858 Bit32u count_left; 01859 if (count<(Bitu)CPU_Cycles) { 01860 count_left=0; 01861 } else { 01862 count_left= (Bit32u)(count - CPU_Cycles); 01863 count= (Bit32u)CPU_Cycles; 01864 CPU_Cycles=0; 01865 } 01866 add_index<<=2; 01867 for (;count>0;count--) { 01868 reg_eax=mem_readd(si_base+reg_esi); 01869 reg_esi+=add_index; 01870 } 01871 return count_left; 01872 } 01873 01874 01875 static Bit16u DRC_CALL_CONV dynrec_stosb_word(Bit16u count,Bit16s add_index,PhysPt di_base) DRC_FC; 01876 static Bit16u DRC_CALL_CONV dynrec_stosb_word(Bit16u count,Bit16s add_index,PhysPt di_base) { 01877 Bit16u count_left; 01878 if (count<(Bitu)CPU_Cycles) { 01879 count_left=0; 01880 } else { 01881 count_left=(Bit16u)(count-CPU_Cycles); 01882 count=(Bit16u)CPU_Cycles; 01883 CPU_Cycles=0; 01884 } 01885 for (;count>0;count--) { 01886 mem_writeb(di_base+reg_di,reg_al); 01887 reg_di+=add_index; 01888 } 01889 return count_left; 01890 } 01891 01892 static Bit32u DRC_CALL_CONV dynrec_stosb_dword(Bit32u count,Bit32s add_index,PhysPt di_base) DRC_FC; 01893 static Bit32u DRC_CALL_CONV dynrec_stosb_dword(Bit32u count,Bit32s add_index,PhysPt di_base) { 01894 Bit32u count_left; 01895 if (count<(Bitu)CPU_Cycles) { 01896 count_left=0; 01897 } else { 01898 count_left= (Bit32u)(count - CPU_Cycles); 01899 count= (Bit32u)CPU_Cycles; 01900 CPU_Cycles=0; 01901 } 01902 for (;count>0;count--) { 01903 mem_writeb(di_base+reg_edi,reg_al); 01904 reg_edi+=add_index; 01905 } 01906 return count_left; 01907 } 01908 01909 static Bit16u DRC_CALL_CONV dynrec_stosw_word(Bit16u count,Bit16s add_index,PhysPt di_base) DRC_FC; 01910 static Bit16u DRC_CALL_CONV dynrec_stosw_word(Bit16u count,Bit16s add_index,PhysPt di_base) { 01911 Bit16u count_left; 01912 if (count<(Bitu)CPU_Cycles) { 01913 count_left=0; 01914 } else { 01915 count_left=(Bit16u)(count-CPU_Cycles); 01916 count=(Bit16u)CPU_Cycles; 01917 CPU_Cycles=0; 01918 } 01919 add_index<<=1; 01920 for (;count>0;count--) { 01921 mem_writew(di_base+reg_di,reg_ax); 01922 reg_di+=add_index; 01923 } 01924 return count_left; 01925 } 01926 01927 static Bit32u DRC_CALL_CONV dynrec_stosw_dword(Bit32u count,Bit32s add_index,PhysPt di_base) DRC_FC; 01928 static Bit32u DRC_CALL_CONV dynrec_stosw_dword(Bit32u count,Bit32s add_index,PhysPt di_base) { 01929 Bit32u count_left; 01930 if (count<(Bitu)CPU_Cycles) { 01931 count_left=0; 01932 } else { 01933 count_left= (Bit32u)(count - CPU_Cycles); 01934 count=(Bit32u) CPU_Cycles; 01935 CPU_Cycles=0; 01936 } 01937 add_index<<=1; 01938 for (;count>0;count--) { 01939 mem_writew(di_base+reg_edi,reg_ax); 01940 reg_edi+=add_index; 01941 } 01942 return count_left; 01943 } 01944 01945 static Bit16u DRC_CALL_CONV dynrec_stosd_word(Bit16u count,Bit16s add_index,PhysPt di_base) DRC_FC; 01946 static Bit16u DRC_CALL_CONV dynrec_stosd_word(Bit16u count,Bit16s add_index,PhysPt di_base) { 01947 Bit16u count_left; 01948 if (count<(Bitu)CPU_Cycles) { 01949 count_left=0; 01950 } else { 01951 count_left=(Bit16u)(count-CPU_Cycles); 01952 count=(Bit16u)CPU_Cycles; 01953 CPU_Cycles=0; 01954 } 01955 add_index<<=2; 01956 for (;count>0;count--) { 01957 mem_writed(di_base+reg_di,reg_eax); 01958 reg_di+=add_index; 01959 } 01960 return count_left; 01961 } 01962 01963 static Bit32u DRC_CALL_CONV dynrec_stosd_dword(Bit32u count,Bit32s add_index,PhysPt di_base) DRC_FC; 01964 static Bit32u DRC_CALL_CONV dynrec_stosd_dword(Bit32u count,Bit32s add_index,PhysPt di_base) { 01965 Bit32u count_left; 01966 if (count<(Bitu)CPU_Cycles) { 01967 count_left=0; 01968 } else { 01969 count_left= (Bit32u)(count - CPU_Cycles); 01970 count=(Bit32u) CPU_Cycles; 01971 CPU_Cycles=0; 01972 } 01973 add_index<<=2; 01974 for (;count>0;count--) { 01975 mem_writed(di_base+reg_edi,reg_eax); 01976 reg_edi+=add_index; 01977 } 01978 return count_left; 01979 } 01980 01981 01982 static void DRC_CALL_CONV dynrec_push_word(Bit16u value) DRC_FC; 01983 static void DRC_CALL_CONV dynrec_push_word(Bit16u value) { 01984 Bit32u new_esp=(reg_esp&cpu.stack.notmask)|((reg_esp-2)&cpu.stack.mask); 01985 mem_writew(SegPhys(ss) + (new_esp & cpu.stack.mask),value); 01986 reg_esp=new_esp; 01987 } 01988 01989 static void DRC_CALL_CONV dynrec_push_dword(Bit32u value) DRC_FC; 01990 static void DRC_CALL_CONV dynrec_push_dword(Bit32u value) { 01991 Bit32u new_esp=(reg_esp&cpu.stack.notmask)|((reg_esp-4)&cpu.stack.mask); 01992 mem_writed(SegPhys(ss) + (new_esp & cpu.stack.mask) ,value); 01993 reg_esp=new_esp; 01994 } 01995 01996 static Bit16u DRC_CALL_CONV dynrec_pop_word(void) DRC_FC; 01997 static Bit16u DRC_CALL_CONV dynrec_pop_word(void) { 01998 Bit16u val=mem_readw(SegPhys(ss) + (reg_esp & cpu.stack.mask)); 01999 reg_esp=(reg_esp&cpu.stack.notmask)|((reg_esp+2)&cpu.stack.mask); 02000 return val; 02001 } 02002 02003 static Bit32u DRC_CALL_CONV dynrec_pop_dword(void) DRC_FC; 02004 static Bit32u DRC_CALL_CONV dynrec_pop_dword(void) { 02005 Bit32u val=mem_readd(SegPhys(ss) + (reg_esp & cpu.stack.mask)); 02006 reg_esp=(reg_esp&cpu.stack.notmask)|((reg_esp+4)&cpu.stack.mask); 02007 return val; 02008 }
1.8.0
