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src/hardware/vga_attr.cpp
00001 /*
00002  *  Copyright (C) 2002-2015  The DOSBox Team
00003  *
00004  *  This program is free software; you can redistribute it and/or modify
00005  *  it under the terms of the GNU General Public License as published by
00006  *  the Free Software Foundation; either version 2 of the License, or
00007  *  (at your option) any later version.
00008  *
00009  *  This program is distributed in the hope that it will be useful,
00010  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
00011  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012  *  GNU General Public License for more details.
00013  *
00014  *  You should have received a copy of the GNU General Public License
00015  *  along with this program; if not, write to the Free Software
00016  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
00017  */
00018 
00019 
00020 #include "dosbox.h"
00021 #include "inout.h"
00022 #include "vga.h"
00023 
00024 #define attr(blah) vga.attr.blah
00025 
00026 void VGA_ATTR_SetEGAMonitorPalette(EGAMonitorMode m) {
00027         // palette bit assignment:
00028         // bit | pin | EGA        | CGA       | monochrome
00029         // ----+-----+------------+-----------+------------
00030         // 0   | 5   | blue       | blue      | nc
00031         // 1   | 4   | green      | green*    | nc
00032         // 2   | 3   | red        | red*      | nc
00033         // 3   | 7   | blue sec.  | nc        | video
00034         // 4   | 6   | green sec. | intensity | intensity
00035         // 5   | 2   | red sec.   | nc        | nc
00036     // 6-7 | not used
00037         // * additive color brown instead of yellow
00038         switch(m) {
00039                 case CGA:
00040                         //LOG_MSG("Monitor CGA");
00041                         for (Bitu i=0;i<64;i++) {
00042                                 vga.dac.rgb[i].red=((i & 0x4)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00043                                 vga.dac.rgb[i].blue=((i & 0x1)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00044                                 
00045                                 // replace yellow with brown
00046                                 if ((i & 0x17) == 0x6) vga.dac.rgb[i].green = 0x15;
00047                                 else vga.dac.rgb[i].green =
00048                                         ((i & 0x2)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00049                         }
00050                         break;
00051                 case EGA:
00052                         //LOG_MSG("Monitor EGA");
00053                         for (Bitu i=0;i<64;i++) {
00054                                 vga.dac.rgb[i].red=((i & 0x4)? 0x2a:0) + ((i & 0x20)? 0x15:0);
00055                                 vga.dac.rgb[i].green=((i & 0x2)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00056                                 vga.dac.rgb[i].blue=((i & 0x1)? 0x2a:0) + ((i & 0x8)? 0x15:0);
00057                         }
00058                         break;
00059                 case MONO:
00060                         //LOG_MSG("Monitor MONO");
00061                         for (Bitu i=0;i<64;i++) {
00062                                 Bit8u value = ((i & 0x8)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00063                                 vga.dac.rgb[i].red = vga.dac.rgb[i].green =
00064                                         vga.dac.rgb[i].blue = value;
00065                         }
00066                         break;
00067         }
00068 
00069         // update the mappings
00070         for (Bit8u i=0;i<0x10;i++)
00071                 VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
00072 }
00073 
00074 void VGA_ATTR_SetPalette(Bit8u index, Bit8u val) {
00075         // the attribute table stores only 6 bits
00076         val &= 63; 
00077         vga.attr.palette[index] = val;
00078 
00079     if (!IS_EGA_ARCH) {
00080         // apply the plane mask
00081         val = vga.attr.palette[index & vga.attr.color_plane_enable];
00082 
00083         // replace bits 4-5 if configured
00084         if (vga.attr.mode_control & 0x80)
00085             val = (val&0xf) | (vga.attr.color_select << 4);
00086 
00087         // set bits 6 and 7 (not relevant for EGA)
00088         val |= (vga.attr.color_select & 0xc) << 4;
00089 
00090         // apply
00091         VGA_DAC_CombineColor(index,val);
00092     }
00093     else {
00094         VGA_DAC_CombineColor(index,index);
00095     }
00096 }
00097 
00098 Bitu read_p3c0(Bitu /*port*/,Bitu /*iolen*/) {
00099         // Wcharts, Win 3.11 & 95 SVGA
00100         Bitu retval = attr(index) & 0x1f;
00101         if (!(attr(disabled) & 0x1)) retval |= 0x20;
00102         return retval;
00103 }
00104  
00105 void write_p3c0(Bitu /*port*/,Bitu val,Bitu iolen) {
00106         if (!vga.internal.attrindex) {
00107                 attr(index)=val & 0x1F;
00108                 vga.internal.attrindex=true;
00109                 if (val & 0x20) attr(disabled) &= ~1;
00110                 else attr(disabled) |= 1;
00111                 /* 
00112                         0-4     Address of data register to write to port 3C0h or read from port 3C1h
00113                         5       If set screen output is enabled and the palette can not be modified,
00114                                 if clear screen output is disabled and the palette can be modified.
00115                 */
00116                 return;
00117         } else {
00118                 vga.internal.attrindex=false;
00119                 switch (attr(index)) {
00120                         /* Palette */
00121                 case 0x00:              case 0x01:              case 0x02:              case 0x03:
00122                 case 0x04:              case 0x05:              case 0x06:              case 0x07:
00123                 case 0x08:              case 0x09:              case 0x0a:              case 0x0b:
00124                 case 0x0c:              case 0x0d:              case 0x0e:              case 0x0f:
00125                         if (attr(disabled) & 0x1) VGA_ATTR_SetPalette(attr(index),(Bit8u)val);
00126                         /*
00127                                 0-5     Index into the 256 color DAC table. May be modified by 3C0h index
00128                                 10h and 14h.
00129                         */
00130                         break;
00131                 case 0x10: { /* Mode Control Register */
00132                         if (!IS_VGA_ARCH) val&=0x1f;    // not really correct, but should do it
00133                         Bitu difference = attr(mode_control)^val;
00134                         attr(mode_control)=(Bit8u)val;
00135 
00136                         if (difference & 0x80) {
00137                                 for (Bit8u i=0;i<0x10;i++)
00138                                         VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
00139                         }
00140                         if (difference & 0x08)
00141                                 VGA_SetBlinking(val & 0x8);
00142                         
00143                         if (difference & 0x41)
00144                                 VGA_DetermineMode();
00145 
00146                         if (difference & 0x04) {
00147                                 // recompute the panning value
00148                                 if(vga.mode==M_TEXT) {
00149                                         Bit8u pan_reg = attr(horizontal_pel_panning);
00150                                         if (pan_reg > 7)
00151                                                 vga.config.pel_panning=0;
00152                                         else if (val&0x4) // 9-dot wide characters
00153                                                 vga.config.pel_panning=(Bit8u)(pan_reg+1);
00154                                         else // 8-dot characters
00155                                                 vga.config.pel_panning=(Bit8u)pan_reg;
00156                                 }
00157                         }
00158                         /*
00159                                 0       Graphics mode if set, Alphanumeric mode else.
00160                                 1       Monochrome mode if set, color mode else.
00161                                 2       9-bit wide characters if set.
00162                                         The 9th bit of characters C0h-DFh will be the same as
00163                                         the 8th bit. Otherwise it will be the background color.
00164                                 3       If set Attribute bit 7 is blinking, else high intensity.
00165                                 5       If set the PEL panning register (3C0h index 13h) is temporarily set
00166                                         to 0 from when the line compare causes a wrap around until the next
00167                                         vertical retrace when the register is automatically reloaded with
00168                                         the old value, else the PEL panning register ignores line compares.
00169                                 6       If set pixels are 8 bits wide. Used in 256 color modes.
00170                                 7       If set bit 4-5 of the index into the DAC table are taken from port
00171                                         3C0h index 14h bit 0-1, else the bits in the palette register are
00172                                         used.
00173                         */
00174                         break;
00175                 }
00176                 case 0x11:      /* Overscan Color Register */
00177                         attr(overscan_color)=(Bit8u)val;
00178                         /* 0-5  Color of screen border. Color is defined as in the palette registers. */
00179                         break;
00180                 case 0x12:      /* Color Plane Enable Register */
00181                         /* Why disable colour planes? */
00182                         /* To support weird modes. */
00183                         if ((attr(color_plane_enable)^val) & 0xf) {
00184                                 // in case the plane enable bits change...
00185                                 attr(color_plane_enable)=(Bit8u)val;
00186                                 for (Bit8u i=0;i<0x10;i++)
00187                                         VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
00188                         } else
00189                                 attr(color_plane_enable)=(Bit8u)val;
00190                         /* 
00191                                 0       Bit plane 0 is enabled if set.
00192                                 1       Bit plane 1 is enabled if set.
00193                                 2       Bit plane 2 is enabled if set.
00194                                 3       Bit plane 3 is enabled if set.
00195                                 4-5     Video Status MUX. Diagnostics use only.
00196                                         Two attribute bits appear on bits 4 and 5 of the Input Status
00197                                         Register 1 (3dAh). 0: Bit 2/0, 1: Bit 5/4, 2: bit 3/1, 3: bit 7/6
00198                         */
00199                         break;
00200                 case 0x13:      /* Horizontal PEL Panning Register */
00201                         attr(horizontal_pel_panning)=val & 0xF;
00202                         switch (vga.mode) {
00203                         case M_TEXT:
00204                                 if (val > 7)
00205                                         vga.config.pel_panning=0;
00206                                 else if (vga.attr.mode_control&0x4) // 9-dot wide characters
00207                                         vga.config.pel_panning=(Bit8u)(val+1);
00208                                 else // 8-dot characters
00209                                         vga.config.pel_panning=(Bit8u)val;
00210                                 break;
00211                         case M_VGA:
00212                         case M_LIN8:
00213                                 vga.config.pel_panning=(val & 0x7)/2;
00214                                 break;
00215                         case M_LIN16:
00216                         default:
00217                                 vga.config.pel_panning=(val & 0x7);
00218                         }
00219                         if (machine==MCH_EGA)
00220                                 // On the EGA panning can be programmed for every scanline:
00221                                 vga.draw.panning = vga.config.pel_panning;
00222                         /*
00223                                 0-3     Indicates number of pixels to shift the display left
00224                                         Value  9bit textmode   256color mode   Other modes
00225                                         0          1               0              0
00226                                         1          2              n/a             1
00227                                         2          3               1              2
00228                                         3          4              n/a             3
00229                                         4          5               2              4
00230                                         5          6              n/a             5
00231                                         6          7               3              6
00232                                         7          8              n/a             7
00233                                         8          0              n/a            n/a
00234                         */
00235                         break;
00236                 case 0x14:      /* Color Select Register */
00237                         if (!IS_VGA_ARCH) {
00238                                 attr(color_select)=0;
00239                                 break;
00240                         }
00241                         if (attr(color_select) ^ val) {
00242                                 attr(color_select)=(Bit8u)val;
00243                                 for (Bit8u i=0;i<0x10;i++)
00244                                         VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
00245                         }
00246                         /*
00247                                 0-1     If 3C0h index 10h bit 7 is set these 2 bits are used as bits 4-5 of
00248                                         the index into the DAC table.
00249                                 2-3     These 2 bits are used as bit 6-7 of the index into the DAC table
00250                                         except in 256 color mode.
00251                                         Note: this register does not affect 256 color modes.
00252                         */
00253                         break;
00254                 default:
00255                         if (svga.write_p3c0) {
00256                                 svga.write_p3c0(attr(index), val, iolen);
00257                                 break;
00258                         }
00259                         LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:ATTR:Write to unkown Index %2X",attr(index));
00260                         break;
00261                 }
00262         }
00263 }
00264 
00265 Bitu read_p3c1(Bitu /*port*/,Bitu iolen) {
00266 //      vga.internal.attrindex=false;
00267         switch (attr(index)) {
00268                         /* Palette */
00269         case 0x00:              case 0x01:              case 0x02:              case 0x03:
00270         case 0x04:              case 0x05:              case 0x06:              case 0x07:
00271         case 0x08:              case 0x09:              case 0x0a:              case 0x0b:
00272         case 0x0c:              case 0x0d:              case 0x0e:              case 0x0f:
00273                 return attr(palette[attr(index)]);
00274         case 0x10: /* Mode Control Register */
00275                 return attr(mode_control);
00276         case 0x11:      /* Overscan Color Register */
00277                 return attr(overscan_color);
00278         case 0x12:      /* Color Plane Enable Register */
00279                 return attr(color_plane_enable);
00280         case 0x13:      /* Horizontal PEL Panning Register */
00281                 return attr(horizontal_pel_panning);
00282         case 0x14:      /* Color Select Register */
00283                 return attr(color_select);
00284         default:
00285                 if (svga.read_p3c1)
00286                         return svga.read_p3c1(attr(index), iolen);
00287                 LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:ATTR:Read from unkown Index %2X",attr(index));
00288         }
00289         return 0;
00290 }
00291 
00292 
00293 void VGA_SetupAttr(void) {
00294         if (IS_EGAVGA_ARCH) {
00295                 IO_RegisterWriteHandler(0x3c0,write_p3c0,IO_MB);
00296                 if (IS_VGA_ARCH) {
00297                         IO_RegisterReadHandler(0x3c0,read_p3c0,IO_MB);
00298                         IO_RegisterReadHandler(0x3c1,read_p3c1,IO_MB);
00299                 }
00300         }
00301 }
00302 
00303 void VGA_UnsetupAttr(void) {
00304     IO_FreeWriteHandler(0x3c0,IO_MB);
00305     IO_FreeReadHandler(0x3c0,IO_MB);
00306     IO_FreeWriteHandler(0x3c1,IO_MB);
00307     IO_FreeReadHandler(0x3c1,IO_MB);
00308 }
00309