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src/hardware/vga_attr.cpp
00001 /*
00002  *  Copyright (C) 2002-2015  The DOSBox Team
00003  *
00004  *  This program is free software; you can redistribute it and/or modify
00005  *  it under the terms of the GNU General Public License as published by
00006  *  the Free Software Foundation; either version 2 of the License, or
00007  *  (at your option) any later version.
00008  *
00009  *  This program is distributed in the hope that it will be useful,
00010  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
00011  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012  *  GNU General Public License for more details.
00013  *
00014  *  You should have received a copy of the GNU General Public License
00015  *  along with this program; if not, write to the Free Software
00016  *  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
00017  */
00018 
00019 
00020 #include "dosbox.h"
00021 #include "inout.h"
00022 #include "vga.h"
00023 
00024 #define attr(blah) vga.attr.blah
00025 
00026 void VGA_ATTR_SetEGAMonitorPalette(EGAMonitorMode m) {
00027         // palette bit assignment:
00028         // bit | pin | EGA        | CGA       | monochrome
00029         // ----+-----+------------+-----------+------------
00030         // 0   | 5   | blue       | blue      | nc
00031         // 1   | 4   | green      | green*    | nc
00032         // 2   | 3   | red        | red*      | nc
00033         // 3   | 7   | blue sec.  | nc        | video
00034         // 4   | 6   | green sec. | intensity | intensity
00035         // 5   | 2   | red sec.   | nc        | nc
00036     // 6-7 | not used
00037         // * additive color brown instead of yellow
00038         switch(m) {
00039                 case CGA:
00040                         //LOG_MSG("Monitor CGA");
00041                         for (Bitu i=0;i<64;i++) {
00042                                 vga.dac.rgb[i].red=((i & 0x4)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00043                                 vga.dac.rgb[i].blue=((i & 0x1)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00044                                 
00045                                 // replace yellow with brown
00046                                 if ((i & 0x17) == 0x6) vga.dac.rgb[i].green = 0x15;
00047                                 else vga.dac.rgb[i].green =
00048                                         ((i & 0x2)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00049                         }
00050                         break;
00051                 case EGA:
00052                         //LOG_MSG("Monitor EGA");
00053                         for (Bitu i=0;i<64;i++) {
00054                                 vga.dac.rgb[i].red=((i & 0x4)? 0x2a:0) + ((i & 0x20)? 0x15:0);
00055                                 vga.dac.rgb[i].green=((i & 0x2)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00056                                 vga.dac.rgb[i].blue=((i & 0x1)? 0x2a:0) + ((i & 0x8)? 0x15:0);
00057                         }
00058                         break;
00059                 case MONO:
00060                         //LOG_MSG("Monitor MONO");
00061                         for (Bitu i=0;i<64;i++) {
00062                                 Bit8u value = ((i & 0x8)? 0x2a:0) + ((i & 0x10)? 0x15:0);
00063                                 vga.dac.rgb[i].red = vga.dac.rgb[i].green =
00064                                         vga.dac.rgb[i].blue = value;
00065                         }
00066                         break;
00067         }
00068 
00069         // update the mappings
00070         for (Bit8u i=0;i<0x10;i++)
00071                 VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
00072 }
00073 
00074 void VGA_ATTR_SetPalette(Bit8u index, Bit8u val) {
00075         // the attribute table stores only 6 bits
00076         val &= 63; 
00077         vga.attr.palette[index] = val;
00078 
00079     if (IS_VGA_ARCH) {
00080         // apply the plane mask
00081         val = vga.attr.palette[index & vga.attr.color_plane_enable];
00082 
00083         // Tseng ET4000AX behavior (according to how COPPER.EXE treats the hardware)
00084         // and according to real hardware:
00085         //
00086         // - If P54S (palette select bits 5-4) are enabled, replace bits 7-4 of the
00087         //   color index with the entire color select register. COPPER.EXE line fading
00088         //   tricks will not work correctly otherwise.
00089         //
00090         // - If P54S is not enabled, then do not apply any Color Select register bits.
00091         //   This is contrary to standard VGA behavior that would always apply Color
00092         //   Select bits 3-2 to index bits 7-6 in any mode other than 256-color mode.
00093         if (VGA_AC_remap == AC_low4) {
00094             if (vga.attr.mode_control & 0x80)
00095                 val = (val&0xf) | (vga.attr.color_select << 4);
00096         }
00097         // normal VGA/SVGA behavior:
00098         //
00099         // - ignore color select in 256-color mode entirely
00100         //
00101         // - otherwise, if P54S is enabled, replace bits 5-4 with bits 1-0 of color select.
00102         //
00103         // - always replace bits 7-6 with bits 3-2 of color select.
00104         else {
00105             if (!(vga.mode == M_VGA || vga.mode == M_LIN8)) {
00106                 // replace bits 5-4 if P54S is enabled
00107                 if (vga.attr.mode_control & 0x80)
00108                     val = (val&0xf) | ((vga.attr.color_select & 0x3) << 4);
00109 
00110                 // always replace bits 7-6
00111                 val |= (vga.attr.color_select & 0xc) << 4;
00112             }
00113         }
00114 
00115         // apply
00116         VGA_DAC_CombineColor(index,val);
00117     }
00118     else {
00119         VGA_DAC_CombineColor(index,index);
00120     }
00121 }
00122 
00123 Bitu read_p3c0(Bitu /*port*/,Bitu /*iolen*/) {
00124         // Wcharts, Win 3.11 & 95 SVGA
00125         Bitu retval = attr(index) & 0x1f;
00126         if (!(attr(disabled) & 0x1)) retval |= 0x20;
00127         return retval;
00128 }
00129  
00130 void write_p3c0(Bitu /*port*/,Bitu val,Bitu iolen) {
00131         if (!vga.internal.attrindex) {
00132                 attr(index)=val & 0x1F;
00133                 vga.internal.attrindex=true;
00134                 if (val & 0x20) attr(disabled) &= ~1;
00135                 else attr(disabled) |= 1;
00136                 /* 
00137                         0-4     Address of data register to write to port 3C0h or read from port 3C1h
00138                         5       If set screen output is enabled and the palette can not be modified,
00139                                 if clear screen output is disabled and the palette can be modified.
00140                 */
00141                 return;
00142         } else {
00143                 vga.internal.attrindex=false;
00144                 switch (attr(index)) {
00145                         /* Palette */
00146                 case 0x00:              case 0x01:              case 0x02:              case 0x03:
00147                 case 0x04:              case 0x05:              case 0x06:              case 0x07:
00148                 case 0x08:              case 0x09:              case 0x0a:              case 0x0b:
00149                 case 0x0c:              case 0x0d:              case 0x0e:              case 0x0f:
00150                         if (attr(disabled) & 0x1) VGA_ATTR_SetPalette(attr(index),(Bit8u)val);
00151                         /*
00152                                 0-5     Index into the 256 color DAC table. May be modified by 3C0h index
00153                                 10h and 14h.
00154                         */
00155                         break;
00156                 case 0x10: { /* Mode Control Register */
00157                         if (!IS_VGA_ARCH) val&=0x1f;    // not really correct, but should do it
00158                         Bitu difference = attr(mode_control)^val;
00159                         attr(mode_control)=(Bit8u)val;
00160 
00161                         if (difference & 0x80) {
00162                                 for (Bit8u i=0;i<0x10;i++)
00163                                         VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
00164                         }
00165                         if (difference & 0x08)
00166                                 VGA_SetBlinking(val & 0x8);
00167                         
00168                         if (difference & 0x41)
00169                                 VGA_DetermineMode();
00170 
00171                         if (difference & 0x04) {
00172                                 // recompute the panning value
00173                                 if(vga.mode==M_TEXT) {
00174                                         Bit8u pan_reg = attr(horizontal_pel_panning);
00175                                         if (pan_reg > 7)
00176                                                 vga.config.pel_panning=0;
00177                                         else if (val&0x4) // 9-dot wide characters
00178                                                 vga.config.pel_panning=(Bit8u)(pan_reg+1);
00179                                         else // 8-dot characters
00180                                                 vga.config.pel_panning=(Bit8u)pan_reg;
00181                                 }
00182                         }
00183                         /*
00184                                 0       Graphics mode if set, Alphanumeric mode else.
00185                                 1       Monochrome mode if set, color mode else.
00186                                 2       9-bit wide characters if set.
00187                                         The 9th bit of characters C0h-DFh will be the same as
00188                                         the 8th bit. Otherwise it will be the background color.
00189                                 3       If set Attribute bit 7 is blinking, else high intensity.
00190                                 5       If set the PEL panning register (3C0h index 13h) is temporarily set
00191                                         to 0 from when the line compare causes a wrap around until the next
00192                                         vertical retrace when the register is automatically reloaded with
00193                                         the old value, else the PEL panning register ignores line compares.
00194                                 6       If set pixels are 8 bits wide. Used in 256 color modes.
00195                                 7       If set bit 4-5 of the index into the DAC table are taken from port
00196                                         3C0h index 14h bit 0-1, else the bits in the palette register are
00197                                         used.
00198                         */
00199                         break;
00200                 }
00201                 case 0x11:      /* Overscan Color Register */
00202                         attr(overscan_color)=(Bit8u)val;
00203                         /* 0-5  Color of screen border. Color is defined as in the palette registers. */
00204                         break;
00205                 case 0x12:      /* Color Plane Enable Register */
00206                         /* Why disable colour planes? */
00207                         /* To support weird modes. */
00208                         if ((attr(color_plane_enable)^val) & 0xf) {
00209                                 // in case the plane enable bits change...
00210                                 attr(color_plane_enable)=(Bit8u)val;
00211                                 for (Bit8u i=0;i<0x10;i++)
00212                                         VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
00213                         } else
00214                                 attr(color_plane_enable)=(Bit8u)val;
00215                         /* 
00216                                 0       Bit plane 0 is enabled if set.
00217                                 1       Bit plane 1 is enabled if set.
00218                                 2       Bit plane 2 is enabled if set.
00219                                 3       Bit plane 3 is enabled if set.
00220                                 4-5     Video Status MUX. Diagnostics use only.
00221                                         Two attribute bits appear on bits 4 and 5 of the Input Status
00222                                         Register 1 (3dAh). 0: Bit 2/0, 1: Bit 5/4, 2: bit 3/1, 3: bit 7/6
00223                         */
00224                         break;
00225                 case 0x13:      /* Horizontal PEL Panning Register */
00226                         attr(horizontal_pel_panning)=val & 0xF;
00227                         switch (vga.mode) {
00228                         case M_TEXT:
00229                                 if (val > 7)
00230                                         vga.config.pel_panning=0;
00231                                 else if (vga.attr.mode_control&0x4) // 9-dot wide characters
00232                                         vga.config.pel_panning=(Bit8u)(val+1);
00233                                 else // 8-dot characters
00234                                         vga.config.pel_panning=(Bit8u)val;
00235                                 break;
00236                         case M_VGA:
00237                         case M_LIN8:
00238                                 vga.config.pel_panning=(val & 0x7)/2;
00239                                 break;
00240                         case M_LIN16:
00241                         default:
00242                                 vga.config.pel_panning=(val & 0x7);
00243                         }
00244                         if (machine==MCH_EGA)
00245                                 // On the EGA panning can be programmed for every scanline:
00246                                 vga.draw.panning = vga.config.pel_panning;
00247                         /*
00248                                 0-3     Indicates number of pixels to shift the display left
00249                                         Value  9bit textmode   256color mode   Other modes
00250                                         0          1               0              0
00251                                         1          2              n/a             1
00252                                         2          3               1              2
00253                                         3          4              n/a             3
00254                                         4          5               2              4
00255                                         5          6              n/a             5
00256                                         6          7               3              6
00257                                         7          8              n/a             7
00258                                         8          0              n/a            n/a
00259                         */
00260                         break;
00261                 case 0x14:      /* Color Select Register */
00262                         if (!IS_VGA_ARCH) {
00263                                 attr(color_select)=0;
00264                                 break;
00265                         }
00266                         if (attr(color_select) ^ val) {
00267                                 attr(color_select)=(Bit8u)val;
00268                                 for (Bit8u i=0;i<0x10;i++)
00269                                         VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
00270                         }
00271                         /*
00272                                 0-1     If 3C0h index 10h bit 7 is set these 2 bits are used as bits 4-5 of
00273                                         the index into the DAC table.
00274                                 2-3     These 2 bits are used as bit 6-7 of the index into the DAC table
00275                                         except in 256 color mode.
00276                                         Note: this register does not affect 256 color modes.
00277                         */
00278                         break;
00279                 default:
00280                         if (svga.write_p3c0) {
00281                                 svga.write_p3c0(attr(index), val, iolen);
00282                                 break;
00283                         }
00284                         LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:ATTR:Write to unkown Index %2X",attr(index));
00285                         break;
00286                 }
00287         }
00288 }
00289 
00290 Bitu read_p3c1(Bitu /*port*/,Bitu iolen) {
00291 //      vga.internal.attrindex=false;
00292         switch (attr(index)) {
00293                         /* Palette */
00294         case 0x00:              case 0x01:              case 0x02:              case 0x03:
00295         case 0x04:              case 0x05:              case 0x06:              case 0x07:
00296         case 0x08:              case 0x09:              case 0x0a:              case 0x0b:
00297         case 0x0c:              case 0x0d:              case 0x0e:              case 0x0f:
00298                 return attr(palette[attr(index)]);
00299         case 0x10: /* Mode Control Register */
00300                 return attr(mode_control);
00301         case 0x11:      /* Overscan Color Register */
00302                 return attr(overscan_color);
00303         case 0x12:      /* Color Plane Enable Register */
00304                 return attr(color_plane_enable);
00305         case 0x13:      /* Horizontal PEL Panning Register */
00306                 return attr(horizontal_pel_panning);
00307         case 0x14:      /* Color Select Register */
00308                 return attr(color_select);
00309         default:
00310                 if (svga.read_p3c1)
00311                         return svga.read_p3c1(attr(index), iolen);
00312                 LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:ATTR:Read from unkown Index %2X",attr(index));
00313         }
00314         return 0;
00315 }
00316 
00317 
00318 void VGA_SetupAttr(void) {
00319         if (IS_EGAVGA_ARCH) {
00320                 IO_RegisterWriteHandler(0x3c0,write_p3c0,IO_MB);
00321                 if (IS_VGA_ARCH) {
00322                         IO_RegisterReadHandler(0x3c0,read_p3c0,IO_MB);
00323                         IO_RegisterReadHandler(0x3c1,read_p3c1,IO_MB);
00324                 }
00325         }
00326 }
00327 
00328 void VGA_UnsetupAttr(void) {
00329     IO_FreeWriteHandler(0x3c0,IO_MB);
00330     IO_FreeReadHandler(0x3c0,IO_MB);
00331     IO_FreeWriteHandler(0x3c1,IO_MB);
00332     IO_FreeReadHandler(0x3c1,IO_MB);
00333 }
00334