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src/hardware/vga_pc98_crtc.cpp
00001 
00002 #include "dosbox.h"
00003 #include "setup.h"
00004 #include "video.h"
00005 #include "pic.h"
00006 #include "vga.h"
00007 #include "inout.h"
00008 #include "programs.h"
00009 #include "support.h"
00010 #include "setup.h"
00011 #include "timer.h"
00012 #include "mem.h"
00013 #include "util_units.h"
00014 #include "control.h"
00015 #include "pc98_cg.h"
00016 #include "pc98_dac.h"
00017 #include "pc98_gdc.h"
00018 #include "pc98_gdc_const.h"
00019 #include "mixer.h"
00020 
00021 extern bool                 pc98_attr4_graphic;
00022 extern bool                 pc98_graphics_hide_odd_raster_200line;
00023 
00024 bool                        gdc_5mhz_mode = false;
00025 bool                        enable_pc98_egc = true;
00026 bool                        enable_pc98_grcg = true;
00027 bool                        enable_pc98_16color = true;
00028 bool                        GDC_vsync_interrupt = false;
00029 uint8_t                     GDC_display_plane_wait_for_vsync = false;
00030 uint8_t                     GDC_display_plane_pending = false;
00031 uint8_t                     GDC_display_plane = false;
00032 
00033 uint8_t                     pc98_gdc_tile_counter=0;
00034 uint8_t                     pc98_gdc_modereg=0;
00035 uint8_t                     pc98_gdc_vramop=0;
00036 egc_quad                    pc98_gdc_tiles;
00037 
00038 void pc98_crtc_write(Bitu port,Bitu val,Bitu iolen) {
00039     (void)iolen;//UNUSED
00040     switch (port&0xE) {
00041         case 0x0C:      // 0x7C: mode reg / vram operation mode (also, reset tile counter)
00042             if (enable_pc98_grcg) {
00043                 pc98_gdc_tile_counter = 0;
00044                 pc98_gdc_modereg = val;
00045                 pc98_gdc_vramop &= ~(3 << VOPBIT_GRCG);
00046                 pc98_gdc_vramop |= (val & 0xC0) >> (6 - VOPBIT_GRCG);
00047             }
00048             break;
00049         case 0x0E:      // 0x7E: tile data
00050             if (enable_pc98_grcg) {
00051                 pc98_gdc_tiles[pc98_gdc_tile_counter].b[0] = val;
00052                 pc98_gdc_tiles[pc98_gdc_tile_counter].b[1] = val;
00053                 pc98_gdc_tile_counter = (pc98_gdc_tile_counter + 1) & 3;
00054             }
00055             break;
00056         default:
00057             LOG_MSG("PC98 CRTC w: port=0x%02X val=0x%02X unknown",(unsigned int)port,(unsigned int)val);
00058             break;
00059     };
00060 }
00061 
00062 Bitu pc98_crtc_read(Bitu port,Bitu iolen) {
00063     (void)iolen;//UNUSED
00064     LOG_MSG("PC98 CRTC r: port=0x%02X unknown",(unsigned int)port);
00065     return ~0ul;
00066 }
00067 
00068 /* Port 0x6A command handling */
00069 void pc98_port6A_command_write(unsigned char b) {
00070     switch (b) {
00071         case 0x00: // 16-color (analog) disable
00072             gdc_analog = false;
00073             pc98_gdc_vramop &= ~(1 << VOPBIT_ANALOG);
00074             VGA_SetupHandlers();   // confirmed on real hardware: this disables access to E000:0000
00075             pc98_update_palette(); // Testing on real hardware shows that the "digital" and "analog" palettes are completely different.
00076                                    // They're both there in hardware, but one or another is active depending on analog enable.
00077                                    // Also, the 4th bitplane at E000:0000 disappears when switched off from the display and from CPU access.
00078             break;
00079         case 0x01: // or enable
00080             if (enable_pc98_16color) {
00081                 gdc_analog = true;
00082                 pc98_gdc_vramop |= (1 << VOPBIT_ANALOG);
00083                 VGA_SetupHandlers();   // confirmed on real hardware: this enables access to E000:0000
00084                 pc98_update_palette(); // Testing on real hardware shows that the "digital" and "analog" palettes are completely different.
00085                                        // They're both there in hardware, but one or another is active depending on analog enable.
00086                                        // Also, the 4th bitplane at E000:0000 disappears when switched off from the display and from CPU access.
00087             }
00088             break;
00089         case 0x04:
00090             pc98_gdc_vramop &= ~(1 << VOPBIT_EGC);
00091             break;
00092         case 0x05:
00093             if (enable_pc98_egc) pc98_gdc_vramop |= (1 << VOPBIT_EGC);
00094             break;
00095         case 0x06: // TODO
00096         case 0x07: // TODO
00097             // TODO
00098             break;
00099         case 0x0A: // TODO
00100         case 0x0B: // TODO
00101             // TODO
00102             break;
00103         default:
00104             LOG_MSG("PC-98 port 6Ah unknown command 0x%02x",b);
00105             break;
00106     };
00107 }
00108 
00109 /* Port 0x68 command handling */
00110 void pc98_port68_command_write(unsigned char b) {
00111     switch (b) {
00112         case 0x00: // text screeen attribute bit 4 meaning: 0=vertical line
00113         case 0x01: //                                       1=simple graphic
00114             pc98_attr4_graphic = !!(b&1);
00115             break;
00116         case 0x08: // 200-line mode: show odd raster
00117         case 0x09: //                don't show odd raster
00118             pc98_graphics_hide_odd_raster_200line = !!(b&1);
00119             break;
00120         case 0x0A: // TODO
00121         case 0x0B: // TODO
00122             // TODO
00123             break;
00124         default:
00125             LOG_MSG("PC-98 port 68h unknown command 0x%02x",b);
00126             break;
00127     };
00128 }
00129