DOSBox-X
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00001 // 00002 // Copyright (C) 2013-2020 Alexey Khokholov (Nuke.YKT) 00003 // 00004 // This program is free software; you can redistribute it and/or 00005 // modify it under the terms of the GNU General Public License 00006 // as published by the Free Software Foundation; either version 2 00007 // of the License, or (at your option) any later version. 00008 // 00009 // This program is distributed in the hope that it will be useful, 00010 // but WITHOUT ANY WARRANTY; without even the implied warranty of 00011 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00012 // GNU General Public License for more details. 00013 // 00014 // 00015 // Nuked OPL3 emulator. 00016 // Thanks: 00017 // MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh): 00018 // Feedback and Rhythm part calculation information. 00019 // forums.submarine.org.uk(carbon14, opl3): 00020 // Tremolo and phase generator calculation information. 00021 // OPLx decapsulated(Matthew Gambrell, Olli Niemitalo): 00022 // OPL2 ROMs. 00023 // siliconpr0n.org(John McMaster, digshadow): 00024 // YMF262 and VRC VII decaps and die shots. 00025 // 00026 // version: 1.8 00027 // 00028 00029 #ifndef OPL_OPL3_H 00030 #define OPL_OPL3_H 00031 #define OPL_WRITEBUF_SIZE 1024 00032 #define OPL_WRITEBUF_DELAY 1 00033 00034 #include "dosbox.h" 00035 00036 typedef struct _opl3_slot opl3_slot; 00037 typedef struct _opl3_channel opl3_channel; 00038 typedef struct _opl3_chip opl3_chip; 00039 00040 struct _opl3_slot { 00041 opl3_channel *channel; 00042 opl3_chip *chip; 00043 Bit16s out; 00044 Bit16s fbmod; 00045 Bit16s *mod; 00046 Bit16s prout; 00047 Bit16s eg_rout; 00048 Bit16s eg_out; 00049 Bit8u eg_inc; 00050 Bit8u eg_gen; 00051 Bit8u eg_rate; 00052 Bit8u eg_ksl; 00053 Bit8u *trem; 00054 Bit8u reg_vib; 00055 Bit8u reg_type; 00056 Bit8u reg_ksr; 00057 Bit8u reg_mult; 00058 Bit8u reg_ksl; 00059 Bit8u reg_tl; 00060 Bit8u reg_ar; 00061 Bit8u reg_dr; 00062 Bit8u reg_sl; 00063 Bit8u reg_rr; 00064 Bit8u reg_wf; 00065 Bit8u key; 00066 Bit32u pg_reset; 00067 Bit32u pg_phase; 00068 Bit16u pg_phase_out; 00069 Bit8u slot_num; 00070 }; 00071 00072 struct _opl3_channel { 00073 opl3_slot *slots[2]; 00074 opl3_channel *pair; 00075 opl3_chip *chip; 00076 Bit16s *out[4]; 00077 Bit8u chtype; 00078 Bit16u f_num; 00079 Bit8u block; 00080 Bit8u fb; 00081 Bit8u con; 00082 Bit8u alg; 00083 Bit8u ksv; 00084 Bit16u cha, chb; 00085 Bit8u ch_num; 00086 }; 00087 00088 typedef struct _opl3_writebuf { 00089 Bit64u time; 00090 Bit16u reg; 00091 Bit8u data; 00092 } opl3_writebuf; 00093 00094 struct _opl3_chip { 00095 opl3_channel channel[18]; 00096 opl3_slot slot[36]; 00097 Bit16u timer; 00098 Bit64u eg_timer; 00099 Bit8u eg_timerrem; 00100 Bit8u eg_state; 00101 Bit8u eg_add; 00102 Bit8u newm; 00103 Bit8u nts; 00104 Bit8u rhy; 00105 Bit8u vibpos; 00106 Bit8u vibshift; 00107 Bit8u tremolo; 00108 Bit8u tremolopos; 00109 Bit8u tremoloshift; 00110 Bit32u noise; 00111 Bit16s zeromod; 00112 Bit32s mixbuff[2]; 00113 Bit8u rm_hh_bit2; 00114 Bit8u rm_hh_bit3; 00115 Bit8u rm_hh_bit7; 00116 Bit8u rm_hh_bit8; 00117 Bit8u rm_tc_bit3; 00118 Bit8u rm_tc_bit5; 00119 //OPL3L 00120 Bit32s rateratio; 00121 Bit32s samplecnt; 00122 Bit16s oldsamples[2]; 00123 Bit16s samples[2]; 00124 00125 Bit64u writebuf_samplecnt; 00126 Bit32u writebuf_cur; 00127 Bit32u writebuf_last; 00128 Bit64u writebuf_lasttime; 00129 opl3_writebuf writebuf[OPL_WRITEBUF_SIZE]; 00130 }; 00131 00132 void OPL3_Generate(opl3_chip *chip, Bit16s *buf); 00133 void OPL3_GenerateResampled(opl3_chip *chip, Bit16s *buf); 00134 void OPL3_Reset(opl3_chip *chip, Bit32u samplerate); 00135 void OPL3_WriteReg(opl3_chip *chip, Bit16u reg, Bit8u v); 00136 void OPL3_WriteRegBuffered(opl3_chip *chip, Bit16u reg, Bit8u v); 00137 void OPL3_GenerateStream(opl3_chip *chip, Bit16s *sndptr, Bit32u numsamples); 00138 00139 #endif