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DOSBox-X
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DOSBox-X
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00001 /* 00002 * Copyright (C) 2002-2020 The DOSBox Team 00003 * 00004 * This program is free software; you can redistribute it and/or modify 00005 * it under the terms of the GNU General Public License as published by 00006 * the Free Software Foundation; either version 2 of the License, or 00007 * (at your option) any later version. 00008 * 00009 * This program is distributed in the hope that it will be useful, 00010 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00011 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00012 * GNU General Public License for more details. 00013 * 00014 * You should have received a copy of the GNU General Public License along 00015 * with this program; if not, write to the Free Software Foundation, Inc., 00016 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 00017 */ 00018 00019 CASE_0F_D(0x00) /* GRP 6 Exxx */ 00020 { 00021 if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegal_opcode; 00022 GetRM;Bitu which=(rm>>3)&7; 00023 switch (which) { 00024 case 0x00: /* SLDT */ 00025 case 0x01: /* STR */ 00026 { 00027 Bitu saveval; 00028 if (!which) saveval=CPU_SLDT(); 00029 else saveval=CPU_STR(); 00030 if (rm >= 0xc0) {GetEArw;*earw=(Bit16u)saveval;} 00031 else {GetEAa;SaveMw(eaa,(Bit16u)saveval);} 00032 } 00033 break; 00034 case 0x02:case 0x03:case 0x04:case 0x05: 00035 { 00036 /* Just use 16-bit loads since were only using selectors */ 00037 Bitu loadval; 00038 if (rm >= 0xc0 ) {GetEArw;loadval=*earw;} 00039 else {GetEAa;loadval=LoadMw(eaa);} 00040 switch (which) { 00041 case 0x02: 00042 if (cpu.cpl) EXCEPTION(EXCEPTION_GP); 00043 if (CPU_LLDT(loadval)) RUNEXCEPTION(); 00044 break; 00045 case 0x03: 00046 if (cpu.cpl) EXCEPTION(EXCEPTION_GP); 00047 if (CPU_LTR(loadval)) RUNEXCEPTION(); 00048 break; 00049 case 0x04: 00050 CPU_VERR(loadval); 00051 break; 00052 case 0x05: 00053 CPU_VERW(loadval); 00054 break; 00055 } 00056 } 00057 break; 00058 default: 00059 LOG(LOG_CPU,LOG_ERROR)("GRP6:Illegal call %2X",(int)which); 00060 goto illegal_opcode; 00061 } 00062 } 00063 break; 00064 CASE_0F_D(0x01) /* Group 7 Ed */ 00065 { 00066 GetRM;Bitu which=(rm>>3)&7; 00067 if (rm < 0xc0) { //First ones all use EA 00068 GetEAa;Bitu limit; 00069 switch (which) { 00070 case 0x00: /* SGDT */ 00071 SaveMw(eaa,(Bit16u)CPU_SGDT_limit()); 00072 SaveMd(eaa+2,(Bit32u)CPU_SGDT_base()); 00073 break; 00074 case 0x01: /* SIDT */ 00075 SaveMw(eaa,(Bit16u)CPU_SIDT_limit()); 00076 SaveMd(eaa+2,(Bit32u)CPU_SIDT_base()); 00077 break; 00078 case 0x02: /* LGDT */ 00079 if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP); 00080 CPU_LGDT(LoadMw(eaa),LoadMd(eaa+2)); 00081 break; 00082 case 0x03: /* LIDT */ 00083 if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP); 00084 CPU_LIDT(LoadMw(eaa),LoadMd(eaa+2)); 00085 break; 00086 case 0x04: /* SMSW */ 00087 SaveMw(eaa,(Bit16u)CPU_SMSW()); 00088 break; 00089 case 0x06: /* LMSW */ 00090 limit=LoadMw(eaa); 00091 if (CPU_LMSW((Bit16u)limit)) RUNEXCEPTION(); 00092 break; 00093 case 0x07: /* INVLPG */ 00094 if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP); 00095 PAGING_ClearTLB(); 00096 break; 00097 } 00098 } else { 00099 GetEArd; 00100 switch (which) { 00101 case 0x02: /* LGDT */ 00102 if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP); 00103 goto illegal_opcode; 00104 case 0x03: /* LIDT */ 00105 if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP); 00106 goto illegal_opcode; 00107 case 0x04: /* SMSW */ 00108 *eard=(Bit32u)CPU_SMSW(); 00109 break; 00110 case 0x06: /* LMSW */ 00111 if (CPU_LMSW(*eard)) RUNEXCEPTION(); 00112 break; 00113 default: 00114 LOG(LOG_CPU,LOG_ERROR)("Illegal group 7 RM subfunction %d",(int)which); 00115 goto illegal_opcode; 00116 break; 00117 } 00118 00119 } 00120 } 00121 break; 00122 CASE_0F_D(0x02) /* LAR Gd,Ed */ 00123 { 00124 if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegal_opcode; 00125 GetRMrd;Bitu ar=*rmrd; 00126 if (rm >= 0xc0) { 00127 GetEArw;CPU_LAR(*earw,ar); 00128 } else { 00129 GetEAa;CPU_LAR(LoadMw(eaa),ar); 00130 } 00131 *rmrd=(Bit32u)ar; 00132 } 00133 break; 00134 CASE_0F_D(0x03) /* LSL Gd,Ew */ 00135 { 00136 if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegal_opcode; 00137 GetRMrd;Bitu limit=*rmrd; 00138 /* Just load 16-bit values for selectors */ 00139 if (rm >= 0xc0) { 00140 GetEArw;CPU_LSL(*earw,limit); 00141 } else { 00142 GetEAa;CPU_LSL(LoadMw(eaa),limit); 00143 } 00144 *rmrd=(Bit32u)limit; 00145 } 00146 break; 00147 00148 // Pentium Pro 00149 CASE_0F_D(0x40) /* CMOVO */ 00150 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00151 MoveCond32(TFLG_O); break; 00152 CASE_0F_D(0x41) /* CMOVNO */ 00153 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00154 MoveCond32(TFLG_NO); break; 00155 CASE_0F_D(0x42) /* CMOVB */ 00156 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00157 MoveCond32(TFLG_B); break; 00158 CASE_0F_D(0x43) /* CMOVNB */ 00159 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00160 MoveCond32(TFLG_NB); break; 00161 CASE_0F_D(0x44) /* CMOVZ */ 00162 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00163 MoveCond32(TFLG_Z); break; 00164 CASE_0F_D(0x45) /* CMOVNZ */ 00165 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00166 MoveCond32(TFLG_NZ); break; 00167 CASE_0F_D(0x46) /* CMOVBE */ 00168 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00169 MoveCond32(TFLG_BE); break; 00170 CASE_0F_D(0x47) /* CMOVNBE */ 00171 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00172 MoveCond32(TFLG_NBE); break; 00173 CASE_0F_D(0x48) /* CMOVS */ 00174 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00175 MoveCond32(TFLG_S); break; 00176 CASE_0F_D(0x49) /* CMOVNS */ 00177 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00178 MoveCond32(TFLG_NS); break; 00179 CASE_0F_D(0x4A) /* CMOVP */ 00180 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00181 MoveCond32(TFLG_P); break; 00182 CASE_0F_D(0x4B) /* CMOVNP */ 00183 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00184 MoveCond32(TFLG_NP); break; 00185 CASE_0F_D(0x4C) /* CMOVL */ 00186 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00187 MoveCond32(TFLG_L); break; 00188 CASE_0F_D(0x4D) /* CMOVNL */ 00189 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00190 MoveCond32(TFLG_NL); break; 00191 CASE_0F_D(0x4E) /* CMOVLE */ 00192 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00193 MoveCond32(TFLG_LE); break; 00194 CASE_0F_D(0x4F) /* CMOVNLE */ 00195 if (CPU_ArchitectureType<CPU_ARCHTYPE_PPROSLOW) goto illegal_opcode; 00196 MoveCond32(TFLG_NLE); break; 00197 00198 CASE_0F_D(0x80) /* JO */ 00199 JumpCond32_d(TFLG_O);break; 00200 CASE_0F_D(0x81) /* JNO */ 00201 JumpCond32_d(TFLG_NO);break; 00202 CASE_0F_D(0x82) /* JB */ 00203 JumpCond32_d(TFLG_B);break; 00204 CASE_0F_D(0x83) /* JNB */ 00205 JumpCond32_d(TFLG_NB);break; 00206 CASE_0F_D(0x84) /* JZ */ 00207 JumpCond32_d(TFLG_Z);break; 00208 CASE_0F_D(0x85) /* JNZ */ 00209 JumpCond32_d(TFLG_NZ);break; 00210 CASE_0F_D(0x86) /* JBE */ 00211 JumpCond32_d(TFLG_BE);break; 00212 CASE_0F_D(0x87) /* JNBE */ 00213 JumpCond32_d(TFLG_NBE);break; 00214 CASE_0F_D(0x88) /* JS */ 00215 JumpCond32_d(TFLG_S);break; 00216 CASE_0F_D(0x89) /* JNS */ 00217 JumpCond32_d(TFLG_NS);break; 00218 CASE_0F_D(0x8a) /* JP */ 00219 JumpCond32_d(TFLG_P);break; 00220 CASE_0F_D(0x8b) /* JNP */ 00221 JumpCond32_d(TFLG_NP);break; 00222 CASE_0F_D(0x8c) /* JL */ 00223 JumpCond32_d(TFLG_L);break; 00224 CASE_0F_D(0x8d) /* JNL */ 00225 JumpCond32_d(TFLG_NL);break; 00226 CASE_0F_D(0x8e) /* JLE */ 00227 JumpCond32_d(TFLG_LE);break; 00228 CASE_0F_D(0x8f) /* JNLE */ 00229 JumpCond32_d(TFLG_NLE);break; 00230 00231 CASE_0F_D(0xa0) /* PUSH FS */ 00232 Push_32(SegValue(fs));break; 00233 CASE_0F_D(0xa1) /* POP FS */ 00234 if (CPU_PopSeg(fs,true)) RUNEXCEPTION(); 00235 break; 00236 CASE_0F_D(0xa3) /* BT Ed,Gd */ 00237 { 00238 FillFlags();GetRMrd; 00239 Bit32u mask=1u << (*rmrd & 31u); 00240 if (rm >= 0xc0 ) { 00241 GetEArd; 00242 SETFLAGBIT(CF,(*eard & mask)); 00243 } else { 00244 GetEAa;eaa+=(PhysPt)((((Bit32s)*rmrd)>>5)*4); 00245 Bit32u old=LoadMd(eaa); 00246 SETFLAGBIT(CF,(old & mask)); 00247 } 00248 break; 00249 } 00250 CASE_0F_D(0xa4) /* SHLD Ed,Gd,Ib */ 00251 RMEdGdOp3(DSHLD,Fetchb()); 00252 break; 00253 CASE_0F_D(0xa5) /* SHLD Ed,Gd,CL */ 00254 RMEdGdOp3(DSHLD,reg_cl); 00255 break; 00256 CASE_0F_D(0xa8) /* PUSH GS */ 00257 Push_32(SegValue(gs));break; 00258 CASE_0F_D(0xa9) /* POP GS */ 00259 if (CPU_PopSeg(gs,true)) RUNEXCEPTION(); 00260 break; 00261 CASE_0F_D(0xab) /* BTS Ed,Gd */ 00262 { 00263 FillFlags();GetRMrd; 00264 Bit32u mask=1u << (*rmrd & 31u); 00265 if (rm >= 0xc0 ) { 00266 GetEArd; 00267 SETFLAGBIT(CF,(*eard & mask)); 00268 *eard|=mask; 00269 } else { 00270 GetEAa;eaa+=(PhysPt)((((Bit32s)*rmrd)>>5)*4); 00271 Bit32u old=LoadMd(eaa); 00272 SETFLAGBIT(CF,(old & mask)); 00273 SaveMd(eaa,old | mask); 00274 } 00275 break; 00276 } 00277 00278 CASE_0F_D(0xac) /* SHRD Ed,Gd,Ib */ 00279 RMEdGdOp3(DSHRD,Fetchb()); 00280 break; 00281 CASE_0F_D(0xad) /* SHRD Ed,Gd,CL */ 00282 RMEdGdOp3(DSHRD,reg_cl); 00283 break; 00284 CASE_0F_D(0xaf) /* IMUL Gd,Ed */ 00285 { 00286 RMGdEdOp3(DIMULD,*rmrd); 00287 break; 00288 } 00289 CASE_0F_D(0xb1) /* CMPXCHG Ed,Gd */ 00290 { 00291 if (CPU_ArchitectureType<CPU_ARCHTYPE_486NEW) goto illegal_opcode; 00292 FillFlags(); 00293 GetRMrd; 00294 if (rm >= 0xc0) { 00295 GetEArd; 00296 if (*eard==reg_eax) { 00297 *eard=*rmrd; 00298 SETFLAGBIT(ZF,1); 00299 } else { 00300 reg_eax=*eard; 00301 SETFLAGBIT(ZF,0); 00302 } 00303 } else { 00304 GetEAa; 00305 Bit32u val=LoadMd(eaa); 00306 if (val==reg_eax) { 00307 SaveMd(eaa,*rmrd); 00308 SETFLAGBIT(ZF,1); 00309 } else { 00310 SaveMd(eaa,val); // cmpxchg always issues a write 00311 reg_eax=val; 00312 SETFLAGBIT(ZF,0); 00313 } 00314 } 00315 break; 00316 } 00317 CASE_0F_D(0xb2) /* LSS Ed */ 00318 { 00319 GetRMrd; 00320 if (rm >= 0xc0) goto illegal_opcode; 00321 GetEAa; 00322 if (CPU_SetSegGeneral(ss,LoadMw(eaa+4))) RUNEXCEPTION(); 00323 *rmrd=LoadMd(eaa); 00324 break; 00325 } 00326 CASE_0F_D(0xb3) /* BTR Ed,Gd */ 00327 { 00328 FillFlags();GetRMrd; 00329 Bit32u mask=1u << (*rmrd & 31u); 00330 if (rm >= 0xc0 ) { 00331 GetEArd; 00332 SETFLAGBIT(CF,(*eard & mask)); 00333 *eard&= ~mask; 00334 } else { 00335 GetEAa;eaa+=(PhysPt)((((Bit32s)*rmrd)>>5)*4); 00336 Bit32u old=LoadMd(eaa); 00337 SETFLAGBIT(CF,(old & mask)); 00338 SaveMd(eaa,old & ~mask); 00339 } 00340 break; 00341 } 00342 CASE_0F_D(0xb4) /* LFS Ed */ 00343 { 00344 GetRMrd; 00345 if (rm >= 0xc0) goto illegal_opcode; 00346 GetEAa; 00347 if (CPU_SetSegGeneral(fs,LoadMw(eaa+4))) RUNEXCEPTION(); 00348 *rmrd=LoadMd(eaa); 00349 break; 00350 } 00351 CASE_0F_D(0xb5) /* LGS Ed */ 00352 { 00353 GetRMrd; 00354 if (rm >= 0xc0) goto illegal_opcode; 00355 GetEAa; 00356 if (CPU_SetSegGeneral(gs,LoadMw(eaa+4))) RUNEXCEPTION(); 00357 *rmrd=LoadMd(eaa); 00358 break; 00359 } 00360 CASE_0F_D(0xb6) /* MOVZX Gd,Eb */ 00361 { 00362 GetRMrd; 00363 if (rm >= 0xc0 ) {GetEArb;*rmrd=*earb;} 00364 else {GetEAa;*rmrd=LoadMb(eaa);} 00365 break; 00366 } 00367 CASE_0F_D(0xb7) /* MOVXZ Gd,Ew */ 00368 { 00369 GetRMrd; 00370 if (rm >= 0xc0 ) {GetEArw;*rmrd=*earw;} 00371 else {GetEAa;*rmrd=LoadMw(eaa);} 00372 break; 00373 } 00374 CASE_0F_D(0xba) /* GRP8 Ed,Ib */ 00375 { 00376 FillFlags();GetRM; 00377 if (rm >= 0xc0 ) { 00378 GetEArd; 00379 Bit32u mask=1u << (Fetchb() & 31u); 00380 SETFLAGBIT(CF,(*eard & mask)); 00381 switch (rm & 0x38) { 00382 case 0x20: /* BT */ 00383 break; 00384 case 0x28: /* BTS */ 00385 *eard|=mask; 00386 break; 00387 case 0x30: /* BTR */ 00388 *eard&=~mask; 00389 break; 00390 case 0x38: /* BTC */ 00391 if (GETFLAG(CF)) *eard&=~mask; 00392 else *eard|=mask; 00393 break; 00394 default: 00395 E_Exit("CPU:66:0F:BA:Illegal subfunction %X",rm & 0x38); 00396 } 00397 } else { 00398 GetEAa;Bit32u old=LoadMd(eaa); 00399 Bit32u mask=1u << (Fetchb() & 31u); 00400 SETFLAGBIT(CF,(old & mask)); 00401 switch (rm & 0x38) { 00402 case 0x20: /* BT */ 00403 break; 00404 case 0x28: /* BTS */ 00405 SaveMd(eaa,old|mask); 00406 break; 00407 case 0x30: /* BTR */ 00408 SaveMd(eaa,old & ~mask); 00409 break; 00410 case 0x38: /* BTC */ 00411 if (GETFLAG(CF)) old&=~mask; 00412 else old|=mask; 00413 SaveMd(eaa,old); 00414 break; 00415 default: 00416 E_Exit("CPU:66:0F:BA:Illegal subfunction %X",rm & 0x38); 00417 } 00418 } 00419 break; 00420 } 00421 CASE_0F_D(0xbb) /* BTC Ed,Gd */ 00422 { 00423 FillFlags();GetRMrd; 00424 Bit32u mask=1u << (*rmrd & 31u); 00425 if (rm >= 0xc0 ) { 00426 GetEArd; 00427 SETFLAGBIT(CF,(*eard & mask)); 00428 *eard^=mask; 00429 } else { 00430 GetEAa;eaa+=(PhysPt)((((Bit32s)*rmrd)>>5)*4); 00431 Bit32u old=LoadMd(eaa); 00432 SETFLAGBIT(CF,(old & mask)); 00433 SaveMd(eaa,old ^ mask); 00434 } 00435 break; 00436 } 00437 CASE_0F_D(0xbc) /* BSF Gd,Ed */ 00438 { 00439 GetRMrd; 00440 Bit32u value; 00441 if (rm >= 0xc0) { GetEArd; value=*eard; } 00442 else { GetEAa; value=LoadMd(eaa); } 00443 if (value==0) { 00444 SETFLAGBIT(ZF,true); 00445 } else { 00446 Bit32u result = 0; 00447 while ((value & 0x01)==0) { result++; value>>=1; } 00448 SETFLAGBIT(ZF,false); 00449 *rmrd = result; 00450 } 00451 lflags.type=t_UNKNOWN; 00452 break; 00453 } 00454 CASE_0F_D(0xbd) /* BSR Gd,Ed */ 00455 { 00456 GetRMrd; 00457 Bit32u value; 00458 if (rm >= 0xc0) { GetEArd; value=*eard; } 00459 else { GetEAa; value=LoadMd(eaa); } 00460 if (value==0) { 00461 SETFLAGBIT(ZF,true); 00462 } else { 00463 Bit32u result = 31; // Operandsize-1 00464 while ((value & 0x80000000)==0) { result--; value<<=1; } 00465 SETFLAGBIT(ZF,false); 00466 *rmrd = result; 00467 } 00468 lflags.type=t_UNKNOWN; 00469 break; 00470 } 00471 CASE_0F_D(0xbe) /* MOVSX Gd,Eb */ 00472 { 00473 GetRMrd; 00474 if (rm >= 0xc0 ) {GetEArb;*rmrd=(Bit32u)(*(Bit8s *)earb);} 00475 else {GetEAa;*rmrd=(Bit32u)LoadMbs(eaa);} 00476 break; 00477 } 00478 CASE_0F_D(0xbf) /* MOVSX Gd,Ew */ 00479 { 00480 GetRMrd; 00481 if (rm >= 0xc0 ) {GetEArw;*rmrd=(Bit32u)(*(Bit16s *)earw);} 00482 else {GetEAa;*rmrd=(Bit32u)LoadMws(eaa);} 00483 break; 00484 } 00485 CASE_0F_D(0xc1) /* XADD Gd,Ed */ 00486 { 00487 if (CPU_ArchitectureType<CPU_ARCHTYPE_486OLD) goto illegal_opcode; 00488 GetRMrd;Bit32u oldrmrd=*rmrd; 00489 if (rm >= 0xc0 ) {GetEArd;*rmrd=*eard;*eard+=oldrmrd;} 00490 else {GetEAa;*rmrd=LoadMd(eaa);SaveMd(eaa,LoadMd(eaa)+oldrmrd);} 00491 break; 00492 } 00493 CASE_0F_D(0xc7) 00494 { 00495 extern bool enable_cmpxchg8b; 00496 void CPU_CMPXCHG8B(PhysPt eaa); 00497 00498 if (!enable_cmpxchg8b || CPU_ArchitectureType<CPU_ARCHTYPE_PENTIUM) goto illegal_opcode; 00499 GetRM; 00500 if (((rm >> 3) & 7) == 1) { // CMPXCHG8B /1 r/m 00501 if (rm >= 0xc0 ) goto illegal_opcode; 00502 GetEAa; 00503 CPU_CMPXCHG8B(eaa); 00504 } 00505 else { 00506 goto illegal_opcode; 00507 } 00508 break; 00509 } 00510 CASE_0F_D(0xc8) /* BSWAP EAX */ 00511 if (CPU_ArchitectureType<CPU_ARCHTYPE_486OLD) goto illegal_opcode; 00512 BSWAPD(reg_eax);break; 00513 CASE_0F_D(0xc9) /* BSWAP ECX */ 00514 if (CPU_ArchitectureType<CPU_ARCHTYPE_486OLD) goto illegal_opcode; 00515 BSWAPD(reg_ecx);break; 00516 CASE_0F_D(0xca) /* BSWAP EDX */ 00517 if (CPU_ArchitectureType<CPU_ARCHTYPE_486OLD) goto illegal_opcode; 00518 BSWAPD(reg_edx);break; 00519 CASE_0F_D(0xcb) /* BSWAP EBX */ 00520 if (CPU_ArchitectureType<CPU_ARCHTYPE_486OLD) goto illegal_opcode; 00521 BSWAPD(reg_ebx);break; 00522 CASE_0F_D(0xcc) /* BSWAP ESP */ 00523 if (CPU_ArchitectureType<CPU_ARCHTYPE_486OLD) goto illegal_opcode; 00524 BSWAPD(reg_esp);break; 00525 CASE_0F_D(0xcd) /* BSWAP EBP */ 00526 if (CPU_ArchitectureType<CPU_ARCHTYPE_486OLD) goto illegal_opcode; 00527 BSWAPD(reg_ebp);break; 00528 CASE_0F_D(0xce) /* BSWAP ESI */ 00529 if (CPU_ArchitectureType<CPU_ARCHTYPE_486OLD) goto illegal_opcode; 00530 BSWAPD(reg_esi);break; 00531 CASE_0F_D(0xcf) /* BSWAP EDI */ 00532 if (CPU_ArchitectureType<CPU_ARCHTYPE_486OLD) goto illegal_opcode; 00533 BSWAPD(reg_edi);break; 00534 #if C_FPU 00535 #define CASE_0F_MMX(x) CASE_0F_D(x) 00536 #include "prefix_0f_mmx.h" 00537 #undef CASE_0F_MMX 00538 #endif
1.8.0
