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src/hardware/mame/ymdeltat.h
00001 // license:GPL-2.0+
00002 // copyright-holders:Jarek Burczynski
00003 #ifndef MAME_SOUND_YMDELTAT_H
00004 #define MAME_SOUND_YMDELTAT_H
00005 
00006 #pragma once
00007 
00008 
00009 typedef void (*STATUS_CHANGE_HANDLER)(void *chip, uint8_t status_bits);
00010 
00011 
00012 /* DELTA-T (adpcm type B) struct */
00013 struct YM_DELTAT {     /* AT: rearranged and tightened structure */
00014         enum {
00015                 EMULATION_MODE_NORMAL = 0,
00016                 EMULATION_MODE_YM2610 = 1,
00017         };
00018 
00019         uint8_t   *memory;
00020         int32_t   *output_pointer;/* pointer of output pointers   */
00021         int32_t   *pan;           /* pan : &output_pointer[pan]   */
00022         double  freqbase;
00023 #if 0
00024         double  write_time;     /* Y8950: 10 cycles of main clock; YM2608: 20 cycles of main clock */
00025         double  read_time;      /* Y8950: 8 cycles of main clock;  YM2608: 18 cycles of main clock */
00026 #endif
00027         uint32_t  memory_size;
00028         int     output_range;
00029         uint32_t  now_addr;       /* current address      */
00030         uint32_t  now_step;       /* correct step         */
00031         uint32_t  step;           /* step                 */
00032         uint32_t  start;          /* start address        */
00033         uint32_t  limit;          /* limit address        */
00034         uint32_t  end;            /* end address          */
00035         uint32_t  delta;          /* delta scale          */
00036         int32_t   volume;         /* current volume       */
00037         int32_t   acc;            /* shift Measurement value*/
00038         int32_t   adpcmd;         /* next Forecast        */
00039         int32_t   adpcml;         /* current value        */
00040         int32_t   prev_acc;       /* leveling value       */
00041         uint8_t   now_data;       /* current rom data     */
00042         uint8_t   CPU_data;       /* current data from reg 08 */
00043         uint8_t   portstate;      /* port status          */
00044         uint8_t   control2;       /* control reg: SAMPLE, DA/AD, RAM TYPE (x8bit / x1bit), ROM/RAM */
00045         uint8_t   portshift;      /* address bits shift-left:
00046                                 ** 8 for YM2610,
00047                                 ** 5 for Y8950 and YM2608 */
00048 
00049         uint8_t   DRAMportshift;  /* address bits shift-right:
00050                                 ** 0 for ROM and x8bit DRAMs,
00051                                 ** 3 for x1 DRAMs */
00052 
00053         uint8_t   memread;        /* needed for reading/writing external memory */
00054 
00055         /* handlers and parameters for the status flags support */
00056         STATUS_CHANGE_HANDLER   status_set_handler;
00057         STATUS_CHANGE_HANDLER   status_reset_handler;
00058 
00059         /* note that different chips have these flags on different
00060         ** bits of the status register
00061         */
00062         void *  status_change_which_chip;   /* this chip id */
00063         uint8_t   status_change_EOS_bit;      /* 1 on End Of Sample (record/playback/cycle time of AD/DA converting has passed)*/
00064         uint8_t   status_change_BRDY_bit;     /* 1 after recording 2 datas (2x4bits) or after reading/writing 1 data */
00065         uint8_t   status_change_ZERO_bit;     /* 1 if silence lasts for more than 290 milliseconds on ADPCM recording */
00066 
00067         /* neither Y8950 nor YM2608 can generate IRQ when PCMBSY bit changes, so instead of above,
00068         ** the statusflag gets ORed with PCM_BSY (below) (on each read of statusflag of Y8950 and YM2608)
00069         */
00070         uint8_t   PCM_BSY;        /* 1 when ADPCM is playing; Y8950/YM2608 only */
00071 
00072         uint8_t   reg[16];        /* adpcm registers      */
00073         uint8_t   emulation_mode; /* which chip we're emulating */
00074         device_t *device;
00075 
00076         /*void BRDY_callback();*/
00077 
00078         uint8_t ADPCM_Read();
00079         void ADPCM_Write(int r, int v);
00080         void ADPCM_Reset(int panidx, int mode, device_t *dev);
00081         void ADPCM_CALC();
00082 
00083         void postload(uint8_t *regs);
00084         void savestate(device_t *device);
00085 };
00086 
00087 #endif // MAME_SOUND_YMDELTAT_H