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include/ne2000.h
00001 
00002 // $Id: ne2k.h,v 1.11.2.3 2003/04/06 17:29:49 bdenney Exp $
00004 //
00005 //  Copyright (C) 2001  MandrakeSoft S.A.
00006 //
00007 //    MandrakeSoft S.A.
00008 //    43, rue d'Aboukir
00009 //    75002 Paris - France
00010 //    http://www.linux-mandrake.com/
00011 //    http://www.mandrakesoft.com/
00012 //
00013 //  This library is free software; you can redistribute it and/or
00014 //  modify it under the terms of the GNU Lesser General Public
00015 //  License as published by the Free Software Foundation; either
00016 //  version 2 of the License, or (at your option) any later version.
00017 //
00018 //  This library is distributed in the hope that it will be useful,
00019 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
00020 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00021 //  Lesser General Public License for more details.
00022 //
00023 //  You should have received a copy of the GNU Lesser General Public
00024 //  License along with this library; if not, write to the Free Software
00025 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
00026 
00027 // Peter Grehan (grehan@iprg.nokia.com) coded all of this
00028 // NE2000/ether stuff.
00029 
00030 //
00031 // An implementation of an ne2000 ISA ethernet adapter. This part uses
00032 // a National Semiconductor DS-8390 ethernet MAC chip, with some h/w
00033 // to provide a windowed memory region for the chip and a MAC address.
00034 //
00035 
00036 #include "dosbox.h"
00037 
00038 #define bx_bool int
00039 #define bx_param_c Bit8u
00040 
00041 
00042 #  define BX_NE2K_SMF
00043 #  define BX_NE2K_THIS_PTR 
00044 #  define BX_NE2K_THIS  
00045 //#define BX_INFO 
00046 //LOG_MSG
00047 //#define BX_DEBUG 
00048 //LOG_MSG
00049 
00050 #define  BX_NE2K_MEMSIZ    (32*1024)
00051 #define  BX_NE2K_MEMSTART  (16*1024)
00052 #define  BX_NE2K_MEMEND    (BX_NE2K_MEMSTART + BX_NE2K_MEMSIZ)
00053 
00054 typedef struct {
00055   //
00056   // ne2k register state
00057    
00058   //
00059   // Page 0
00060   //
00061   //  Command Register - 00h read/write
00062   struct CR_t {
00063     bx_bool  stop;              // STP - Software Reset command
00064     bx_bool  start;             // START - start the NIC
00065     bx_bool  tx_packet; // TXP - initiate packet transmission
00066     Bit8u    rdma_cmd;      // RD0,RD1,RD2 - Remote DMA command
00067     Bit8u        pgsel;         // PS0,PS1 - Page select
00068   } CR;
00069   // Interrupt Status Register - 07h read/write
00070   struct ISR_t {  
00071     bx_bool  pkt_rx;            // PRX - packet received with no errors
00072     bx_bool  pkt_tx;            // PTX - packet transmitted with no errors
00073     bx_bool  rx_err;    // RXE - packet received with 1 or more errors
00074     bx_bool  tx_err;    // TXE - packet tx'd       "  " "    "    "
00075     bx_bool  overwrite; // OVW - rx buffer resources exhausted
00076     bx_bool  cnt_oflow;     // CNT - network tally counter MSB's set
00077     bx_bool  rdma_done;     // RDC - remote DMA complete
00078     bx_bool  reset;             // RST - reset status
00079   } ISR;
00080   // Interrupt Mask Register - 0fh write
00081   struct IMR_t {
00082     bx_bool  rx_inte;   // PRXE - packet rx interrupt enable
00083     bx_bool  tx_inte;   // PTXE - packet tx interrput enable
00084     bx_bool  rxerr_inte;        // RXEE - rx error interrupt enable
00085     bx_bool  txerr_inte;        // TXEE - tx error interrupt enable
00086     bx_bool  overw_inte;        // OVWE - overwrite warn int enable
00087     bx_bool  cofl_inte; // CNTE - counter o'flow int enable
00088     bx_bool  rdma_inte; // RDCE - remote DMA complete int enable
00089     bx_bool  reserved;  //  D7 - reserved
00090   } IMR;
00091   // Data Configuration Register - 0eh write
00092   struct DCR_t {
00093     bx_bool  wdsize;    // WTS - 8/16-bit select
00094     bx_bool  endian;    // BOS - byte-order select
00095     bx_bool  longaddr;  // LAS - long-address select
00096     bx_bool  loop;              // LS  - loopback select
00097     bx_bool  auto_rx;   // AR  - auto-remove rx packets with remote DMA
00098     Bit8u    fifo_size; // FT0,FT1 - fifo threshold
00099   } DCR;
00100   // Transmit Configuration Register - 0dh write
00101   struct TCR_t {
00102     bx_bool  crc_disable;       // CRC - inhibit tx CRC
00103     Bit8u    loop_cntl; // LB0,LB1 - loopback control
00104     bx_bool  ext_stoptx;    // ATD - allow tx disable by external mcast
00105     bx_bool  coll_prio; // OFST - backoff algorithm select
00106     Bit8u    reserved;      //  D5,D6,D7 - reserved
00107   } TCR;
00108   // Transmit Status Register - 04h read
00109   struct TSR_t {
00110     bx_bool  tx_ok;             // PTX - tx complete without error
00111     bx_bool  reserved;  //  D1 - reserved
00112     bx_bool  collided;  // COL - tx collided >= 1 times
00113     bx_bool  aborted;   // ABT - aborted due to excessive collisions
00114     bx_bool  no_carrier;        // CRS - carrier-sense lost
00115     bx_bool  fifo_ur;   // FU  - FIFO underrun
00116     bx_bool  cd_hbeat;  // CDH - no tx cd-heartbeat from transceiver
00117     bx_bool  ow_coll;   // OWC - out-of-window collision
00118   } TSR;
00119   // Receive Configuration Register - 0ch write
00120   struct RCR_t {
00121     bx_bool  errors_ok; // SEP - accept pkts with rx errors
00122     bx_bool  runts_ok;  // AR  - accept < 64-byte runts
00123     bx_bool  broadcast; // AB  - accept eth broadcast address
00124     bx_bool  multicast; // AM  - check mcast hash array
00125     bx_bool  promisc;   // PRO - accept all packets
00126     bx_bool  monitor;   // MON - check pkts, but don't rx
00127     Bit8u    reserved;  //  D6,D7 - reserved
00128   } RCR;
00129   // Receive Status Register - 0ch read
00130   struct RSR_t {
00131     bx_bool  rx_ok;             // PRX - rx complete without error
00132     bx_bool  bad_crc;   // CRC - Bad CRC detected
00133     bx_bool  bad_falign;        // FAE - frame alignment error
00134     bx_bool  fifo_or;   // FO  - FIFO overrun
00135     bx_bool  rx_missed; // MPA - missed packet error
00136     bx_bool  rx_mbit;   // PHY - unicast or mcast/bcast address match
00137     bx_bool  rx_disabled;   // DIS - set when in monitor mode
00138     bx_bool  deferred;  // DFR - collision active
00139   } RSR;
00140 
00141   Bit16u local_dma;     // 01,02h read ; current local DMA addr
00142   Bit8u  page_start;  // 01h write ; page start register
00143   Bit8u  page_stop;   // 02h write ; page stop register
00144   Bit8u  bound_ptr;   // 03h read/write ; boundary pointer
00145   Bit8u  tx_page_start; // 04h write ; transmit page start register
00146   Bit8u  num_coll;    // 05h read  ; number-of-collisions register
00147   Bit16u tx_bytes;    // 05,06h write ; transmit byte-count register
00148   Bit8u  fifo;  // 06h read  ; FIFO
00149   Bit16u remote_dma;  // 08,09h read ; current remote DMA addr
00150   Bit16u remote_start;  // 08,09h write ; remote start address register
00151   Bit16u remote_bytes;  // 0a,0bh write ; remote byte-count register
00152   Bit8u  tallycnt_0;  // 0dh read  ; tally counter 0 (frame align errors)
00153   Bit8u  tallycnt_1;  // 0eh read  ; tally counter 1 (CRC errors)
00154   Bit8u  tallycnt_2;  // 0fh read  ; tally counter 2 (missed pkt errors)
00155 
00156   //
00157   // Page 1
00158   //
00159   //   Command Register 00h (repeated)
00160   //
00161   Bit8u  physaddr[6];  // 01-06h read/write ; MAC address
00162   Bit8u  curr_page;    // 07h read/write ; current page register
00163   Bit8u  mchash[8];    // 08-0fh read/write ; multicast hash array
00164 
00165   //
00166   // Page 2  - diagnostic use only
00167   // 
00168   //   Command Register 00h (repeated)
00169   //
00170   //   Page Start Register 01h read  (repeated)
00171   //   Page Stop Register  02h read  (repeated)
00172   //   Current Local DMA Address 01,02h write (repeated)
00173   //   Transmit Page start address 04h read (repeated)
00174   //   Receive Configuration Register 0ch read (repeated)
00175   //   Transmit Configuration Register 0dh read (repeated)
00176   //   Data Configuration Register 0eh read (repeated)
00177   //   Interrupt Mask Register 0fh read (repeated)
00178   //
00179   Bit8u  rempkt_ptr;   // 03h read/write ; remote next-packet pointer
00180   Bit8u  localpkt_ptr; // 05h read/write ; local next-packet pointer
00181   Bit16u address_cnt;  // 06,07h read/write ; address counter
00182 
00183     //
00184     // Page 3  - should never be modified.
00185     //
00186 
00187     // Novell ASIC state
00188   Bit8u  macaddr[32];          // ASIC ROM'd MAC address, even bytes
00189   Bit8u  mem[BX_NE2K_MEMSIZ];  // on-chip packet memory
00190 
00191     // ne2k internal state
00192   Bit32u base_address;
00193   int    base_irq;
00194   int    tx_timer_index;
00195   int    tx_timer_active;
00196 
00197   void register_state(bx_param_c *list_p);
00198   
00199 } bx_ne2k_t;
00200 
00201 
00202 
00203 class bx_ne2k_c  {
00204 public:
00205   bx_ne2k_c(void);
00206   virtual ~bx_ne2k_c(void);
00207   virtual void init(void);
00208   virtual void reset(unsigned type);
00209 
00210 public:
00211   bx_ne2k_t s;
00212 
00213   /* TODO: Setup SDL */
00214   //eth_pktmover_c *ethdev;
00215 
00216   BX_NE2K_SMF Bit32u read_cr(void);
00217   BX_NE2K_SMF void   write_cr(Bit32u value);
00218 
00219   BX_NE2K_SMF Bit32u chipmem_read(Bit32u address, unsigned io_len);
00220   BX_NE2K_SMF Bit32u asic_read(Bit32u offset, unsigned io_len); 
00221   BX_NE2K_SMF Bit32u page0_read(Bit32u offset, unsigned io_len);
00222   BX_NE2K_SMF Bit32u page1_read(Bit32u offset, unsigned io_len);
00223   BX_NE2K_SMF Bit32u page2_read(Bit32u offset, unsigned io_len);
00224   BX_NE2K_SMF Bit32u page3_read(Bit32u offset, unsigned io_len);
00225 
00226   BX_NE2K_SMF void chipmem_write(Bit32u address, Bit32u value, unsigned io_len);
00227   BX_NE2K_SMF void asic_write(Bit32u address, Bit32u value, unsigned io_len);
00228   BX_NE2K_SMF void page0_write(Bit32u address, Bit32u value, unsigned io_len);
00229   BX_NE2K_SMF void page1_write(Bit32u address, Bit32u value, unsigned io_len);
00230   BX_NE2K_SMF void page2_write(Bit32u address, Bit32u value, unsigned io_len);
00231   BX_NE2K_SMF void page3_write(Bit32u address, Bit32u value, unsigned io_len);
00232 
00233 public:
00234   static void tx_timer_handler(void *);
00235   BX_NE2K_SMF void tx_timer(void);
00236 
00237   static void rx_handler(void *arg, const void *buf, unsigned len);
00238   BX_NE2K_SMF unsigned mcast_index(const void *dst);
00239   BX_NE2K_SMF void rx_frame(const void *buf, unsigned io_len);
00240 
00241 
00242   static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
00243   static void   write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
00244 #if !BX_USE_NE2K_SMF
00245   Bit32u read(Bit32u address, unsigned io_len);
00246   void   write(Bit32u address, Bit32u value, unsigned io_len);
00247 #endif
00248 
00249 
00250 };
00251