| channel (defined in _opl3_slot) | _opl3_slot | |
| chip (defined in _opl3_slot) | _opl3_slot | |
| eg_gen (defined in _opl3_slot) | _opl3_slot | |
| eg_inc (defined in _opl3_slot) | _opl3_slot | |
| eg_ksl (defined in _opl3_slot) | _opl3_slot | |
| eg_out (defined in _opl3_slot) | _opl3_slot | |
| eg_rate (defined in _opl3_slot) | _opl3_slot | |
| eg_rout (defined in _opl3_slot) | _opl3_slot | |
| fbmod (defined in _opl3_slot) | _opl3_slot | |
| key (defined in _opl3_slot) | _opl3_slot | |
| mod (defined in _opl3_slot) | _opl3_slot | |
| out (defined in _opl3_slot) | _opl3_slot | |
| pg_phase (defined in _opl3_slot) | _opl3_slot | |
| pg_phase_out (defined in _opl3_slot) | _opl3_slot | |
| pg_reset (defined in _opl3_slot) | _opl3_slot | |
| prout (defined in _opl3_slot) | _opl3_slot | |
| reg_ar (defined in _opl3_slot) | _opl3_slot | |
| reg_dr (defined in _opl3_slot) | _opl3_slot | |
| reg_ksl (defined in _opl3_slot) | _opl3_slot | |
| reg_ksr (defined in _opl3_slot) | _opl3_slot | |
| reg_mult (defined in _opl3_slot) | _opl3_slot | |
| reg_rr (defined in _opl3_slot) | _opl3_slot | |
| reg_sl (defined in _opl3_slot) | _opl3_slot | |
| reg_tl (defined in _opl3_slot) | _opl3_slot | |
| reg_type (defined in _opl3_slot) | _opl3_slot | |
| reg_vib (defined in _opl3_slot) | _opl3_slot | |
| reg_wf (defined in _opl3_slot) | _opl3_slot | |
| slot_num (defined in _opl3_slot) | _opl3_slot | |
| trem (defined in _opl3_slot) | _opl3_slot |
1.8.0