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src/hardware/nukedopl.cpp
00001 //
00002 // Copyright (C) 2013-2018 Alexey Khokholov (Nuke.YKT)
00003 //
00004 // This program is free software; you can redistribute it and/or
00005 // modify it under the terms of the GNU General Public License
00006 // as published by the Free Software Foundation; either version 2
00007 // of the License, or (at your option) any later version.
00008 //
00009 // This program is distributed in the hope that it will be useful,
00010 // but WITHOUT ANY WARRANTY; without even the implied warranty of
00011 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012 // GNU General Public License for more details.
00013 //
00014 //
00015 //  Nuked OPL3 emulator.
00016 //  Thanks:
00017 //      MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):
00018 //          Feedback and Rhythm part calculation information.
00019 //      forums.submarine.org.uk(carbon14, opl3):
00020 //          Tremolo and phase generator calculation information.
00021 //      OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
00022 //          OPL2 ROMs.
00023 //      siliconpr0n.org(John McMaster, digshadow):
00024 //          YMF262 and VRC VII decaps and die shots.
00025 //
00026 // version: 1.8
00027 //
00028 
00029 #include <stdio.h>
00030 #include <stdlib.h>
00031 #include <string.h>
00032 #include "nukedopl.h"
00033 
00034 #define RSM_FRAC    10
00035 
00036 // Channel types
00037 
00038 enum {
00039     ch_2op = 0,
00040     ch_4op = 1,
00041     ch_4op2 = 2,
00042     ch_drum = 3
00043 };
00044 
00045 // Envelope key types
00046 
00047 enum {
00048     egk_norm = 0x01,
00049     egk_drum = 0x02
00050 };
00051 
00052 
00053 //
00054 // logsin table
00055 //
00056 
00057 static const Bit16u logsinrom[256] = {
00058     0x859, 0x6c3, 0x607, 0x58b, 0x52e, 0x4e4, 0x4a6, 0x471,
00059     0x443, 0x41a, 0x3f5, 0x3d3, 0x3b5, 0x398, 0x37e, 0x365,
00060     0x34e, 0x339, 0x324, 0x311, 0x2ff, 0x2ed, 0x2dc, 0x2cd,
00061     0x2bd, 0x2af, 0x2a0, 0x293, 0x286, 0x279, 0x26d, 0x261,
00062     0x256, 0x24b, 0x240, 0x236, 0x22c, 0x222, 0x218, 0x20f,
00063     0x206, 0x1fd, 0x1f5, 0x1ec, 0x1e4, 0x1dc, 0x1d4, 0x1cd,
00064     0x1c5, 0x1be, 0x1b7, 0x1b0, 0x1a9, 0x1a2, 0x19b, 0x195,
00065     0x18f, 0x188, 0x182, 0x17c, 0x177, 0x171, 0x16b, 0x166,
00066     0x160, 0x15b, 0x155, 0x150, 0x14b, 0x146, 0x141, 0x13c,
00067     0x137, 0x133, 0x12e, 0x129, 0x125, 0x121, 0x11c, 0x118,
00068     0x114, 0x10f, 0x10b, 0x107, 0x103, 0x0ff, 0x0fb, 0x0f8,
00069     0x0f4, 0x0f0, 0x0ec, 0x0e9, 0x0e5, 0x0e2, 0x0de, 0x0db,
00070     0x0d7, 0x0d4, 0x0d1, 0x0cd, 0x0ca, 0x0c7, 0x0c4, 0x0c1,
00071     0x0be, 0x0bb, 0x0b8, 0x0b5, 0x0b2, 0x0af, 0x0ac, 0x0a9,
00072     0x0a7, 0x0a4, 0x0a1, 0x09f, 0x09c, 0x099, 0x097, 0x094,
00073     0x092, 0x08f, 0x08d, 0x08a, 0x088, 0x086, 0x083, 0x081,
00074     0x07f, 0x07d, 0x07a, 0x078, 0x076, 0x074, 0x072, 0x070,
00075     0x06e, 0x06c, 0x06a, 0x068, 0x066, 0x064, 0x062, 0x060,
00076     0x05e, 0x05c, 0x05b, 0x059, 0x057, 0x055, 0x053, 0x052,
00077     0x050, 0x04e, 0x04d, 0x04b, 0x04a, 0x048, 0x046, 0x045,
00078     0x043, 0x042, 0x040, 0x03f, 0x03e, 0x03c, 0x03b, 0x039,
00079     0x038, 0x037, 0x035, 0x034, 0x033, 0x031, 0x030, 0x02f,
00080     0x02e, 0x02d, 0x02b, 0x02a, 0x029, 0x028, 0x027, 0x026,
00081     0x025, 0x024, 0x023, 0x022, 0x021, 0x020, 0x01f, 0x01e,
00082     0x01d, 0x01c, 0x01b, 0x01a, 0x019, 0x018, 0x017, 0x017,
00083     0x016, 0x015, 0x014, 0x014, 0x013, 0x012, 0x011, 0x011,
00084     0x010, 0x00f, 0x00f, 0x00e, 0x00d, 0x00d, 0x00c, 0x00c,
00085     0x00b, 0x00a, 0x00a, 0x009, 0x009, 0x008, 0x008, 0x007,
00086     0x007, 0x007, 0x006, 0x006, 0x005, 0x005, 0x005, 0x004,
00087     0x004, 0x004, 0x003, 0x003, 0x003, 0x002, 0x002, 0x002,
00088     0x002, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001,
00089     0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000
00090 };
00091 
00092 //
00093 // exp table
00094 //
00095 
00096 static const Bit16u exprom[256] = {
00097     0x7fa, 0x7f5, 0x7ef, 0x7ea, 0x7e4, 0x7df, 0x7da, 0x7d4,
00098     0x7cf, 0x7c9, 0x7c4, 0x7bf, 0x7b9, 0x7b4, 0x7ae, 0x7a9,
00099     0x7a4, 0x79f, 0x799, 0x794, 0x78f, 0x78a, 0x784, 0x77f,
00100     0x77a, 0x775, 0x770, 0x76a, 0x765, 0x760, 0x75b, 0x756,
00101     0x751, 0x74c, 0x747, 0x742, 0x73d, 0x738, 0x733, 0x72e,
00102     0x729, 0x724, 0x71f, 0x71a, 0x715, 0x710, 0x70b, 0x706,
00103     0x702, 0x6fd, 0x6f8, 0x6f3, 0x6ee, 0x6e9, 0x6e5, 0x6e0,
00104     0x6db, 0x6d6, 0x6d2, 0x6cd, 0x6c8, 0x6c4, 0x6bf, 0x6ba,
00105     0x6b5, 0x6b1, 0x6ac, 0x6a8, 0x6a3, 0x69e, 0x69a, 0x695,
00106     0x691, 0x68c, 0x688, 0x683, 0x67f, 0x67a, 0x676, 0x671,
00107     0x66d, 0x668, 0x664, 0x65f, 0x65b, 0x657, 0x652, 0x64e,
00108     0x649, 0x645, 0x641, 0x63c, 0x638, 0x634, 0x630, 0x62b,
00109     0x627, 0x623, 0x61e, 0x61a, 0x616, 0x612, 0x60e, 0x609,
00110     0x605, 0x601, 0x5fd, 0x5f9, 0x5f5, 0x5f0, 0x5ec, 0x5e8,
00111     0x5e4, 0x5e0, 0x5dc, 0x5d8, 0x5d4, 0x5d0, 0x5cc, 0x5c8,
00112     0x5c4, 0x5c0, 0x5bc, 0x5b8, 0x5b4, 0x5b0, 0x5ac, 0x5a8,
00113     0x5a4, 0x5a0, 0x59c, 0x599, 0x595, 0x591, 0x58d, 0x589,
00114     0x585, 0x581, 0x57e, 0x57a, 0x576, 0x572, 0x56f, 0x56b,
00115     0x567, 0x563, 0x560, 0x55c, 0x558, 0x554, 0x551, 0x54d,
00116     0x549, 0x546, 0x542, 0x53e, 0x53b, 0x537, 0x534, 0x530,
00117     0x52c, 0x529, 0x525, 0x522, 0x51e, 0x51b, 0x517, 0x514,
00118     0x510, 0x50c, 0x509, 0x506, 0x502, 0x4ff, 0x4fb, 0x4f8,
00119     0x4f4, 0x4f1, 0x4ed, 0x4ea, 0x4e7, 0x4e3, 0x4e0, 0x4dc,
00120     0x4d9, 0x4d6, 0x4d2, 0x4cf, 0x4cc, 0x4c8, 0x4c5, 0x4c2,
00121     0x4be, 0x4bb, 0x4b8, 0x4b5, 0x4b1, 0x4ae, 0x4ab, 0x4a8,
00122     0x4a4, 0x4a1, 0x49e, 0x49b, 0x498, 0x494, 0x491, 0x48e,
00123     0x48b, 0x488, 0x485, 0x482, 0x47e, 0x47b, 0x478, 0x475,
00124     0x472, 0x46f, 0x46c, 0x469, 0x466, 0x463, 0x460, 0x45d,
00125     0x45a, 0x457, 0x454, 0x451, 0x44e, 0x44b, 0x448, 0x445,
00126     0x442, 0x43f, 0x43c, 0x439, 0x436, 0x433, 0x430, 0x42d,
00127     0x42a, 0x428, 0x425, 0x422, 0x41f, 0x41c, 0x419, 0x416,
00128     0x414, 0x411, 0x40e, 0x40b, 0x408, 0x406, 0x403, 0x400
00129 };
00130 
00131 //
00132 // freq mult table multiplied by 2
00133 //
00134 // 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 10, 12, 12, 15, 15
00135 //
00136 
00137 static const Bit8u mt[16] = {
00138     1, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 20, 24, 24, 30, 30
00139 };
00140 
00141 //
00142 // ksl table
00143 //
00144 
00145 static const Bit8u kslrom[16] = {
00146     0, 32, 40, 45, 48, 51, 53, 55, 56, 58, 59, 60, 61, 62, 63, 64
00147 };
00148 
00149 static const Bit8u kslshift[4] = {
00150     8, 1, 2, 0
00151 };
00152 
00153 //
00154 // envelope generator constants
00155 //
00156 
00157 static const Bit8u eg_incstep[4][4] = {
00158     { 0, 0, 0, 0 },
00159     { 1, 0, 0, 0 },
00160     { 1, 0, 1, 0 },
00161     { 1, 1, 1, 0 }
00162 };
00163 
00164 //
00165 // address decoding
00166 //
00167 
00168 static const Bit8s ad_slot[0x20] = {
00169     0, 1, 2, 3, 4, 5, -1, -1, 6, 7, 8, 9, 10, 11, -1, -1,
00170     12, 13, 14, 15, 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
00171 };
00172 
00173 static const Bit8u ch_slot[18] = {
00174     0, 1, 2, 6, 7, 8, 12, 13, 14, 18, 19, 20, 24, 25, 26, 30, 31, 32
00175 };
00176 
00177 //
00178 // Envelope generator
00179 //
00180 
00181 typedef Bit16s(*envelope_sinfunc)(Bit16u phase, Bit16u envelope);
00182 typedef void(*envelope_genfunc)(opl3_slot *slott);
00183 
00184 static Bit16s OPL3_EnvelopeCalcExp(Bit32u level)
00185 {
00186     if (level > 0x1fff)
00187     {
00188         level = 0x1fff;
00189     }
00190     return (exprom[level & 0xff] << 1) >> (level >> 8);
00191 }
00192 
00193 static Bit16s OPL3_EnvelopeCalcSin0(Bit16u phase, Bit16u envelope)
00194 {
00195     Bit16u out = 0;
00196     Bit16u neg = 0;
00197     phase &= 0x3ff;
00198     if (phase & 0x200)
00199     {
00200         neg = 0xffff;
00201     }
00202     if (phase & 0x100)
00203     {
00204         out = logsinrom[(phase & 0xff) ^ 0xff];
00205     }
00206     else
00207     {
00208         out = logsinrom[phase & 0xff];
00209     }
00210     return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
00211 }
00212 
00213 static Bit16s OPL3_EnvelopeCalcSin1(Bit16u phase, Bit16u envelope)
00214 {
00215     Bit16u out = 0;
00216     phase &= 0x3ff;
00217     if (phase & 0x200)
00218     {
00219         out = 0x1000;
00220     }
00221     else if (phase & 0x100)
00222     {
00223         out = logsinrom[(phase & 0xff) ^ 0xff];
00224     }
00225     else
00226     {
00227         out = logsinrom[phase & 0xff];
00228     }
00229     return OPL3_EnvelopeCalcExp(out + (envelope << 3));
00230 }
00231 
00232 static Bit16s OPL3_EnvelopeCalcSin2(Bit16u phase, Bit16u envelope)
00233 {
00234     Bit16u out = 0;
00235     phase &= 0x3ff;
00236     if (phase & 0x100)
00237     {
00238         out = logsinrom[(phase & 0xff) ^ 0xff];
00239     }
00240     else
00241     {
00242         out = logsinrom[phase & 0xff];
00243     }
00244     return OPL3_EnvelopeCalcExp(out + (envelope << 3));
00245 }
00246 
00247 static Bit16s OPL3_EnvelopeCalcSin3(Bit16u phase, Bit16u envelope)
00248 {
00249     Bit16u out = 0;
00250     phase &= 0x3ff;
00251     if (phase & 0x100)
00252     {
00253         out = 0x1000;
00254     }
00255     else
00256     {
00257         out = logsinrom[phase & 0xff];
00258     }
00259     return OPL3_EnvelopeCalcExp(out + (envelope << 3));
00260 }
00261 
00262 static Bit16s OPL3_EnvelopeCalcSin4(Bit16u phase, Bit16u envelope)
00263 {
00264     Bit16u out = 0;
00265     Bit16u neg = 0;
00266     phase &= 0x3ff;
00267     if ((phase & 0x300) == 0x100)
00268     {
00269         neg = 0xffff;
00270     }
00271     if (phase & 0x200)
00272     {
00273         out = 0x1000;
00274     }
00275     else if (phase & 0x80)
00276     {
00277         out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
00278     }
00279     else
00280     {
00281         out = logsinrom[(phase << 1) & 0xff];
00282     }
00283     return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
00284 }
00285 
00286 static Bit16s OPL3_EnvelopeCalcSin5(Bit16u phase, Bit16u envelope)
00287 {
00288     Bit16u out = 0;
00289     phase &= 0x3ff;
00290     if (phase & 0x200)
00291     {
00292         out = 0x1000;
00293     }
00294     else if (phase & 0x80)
00295     {
00296         out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
00297     }
00298     else
00299     {
00300         out = logsinrom[(phase << 1) & 0xff];
00301     }
00302     return OPL3_EnvelopeCalcExp(out + (envelope << 3));
00303 }
00304 
00305 static Bit16s OPL3_EnvelopeCalcSin6(Bit16u phase, Bit16u envelope)
00306 {
00307     Bit16u neg = 0;
00308     phase &= 0x3ff;
00309     if (phase & 0x200)
00310     {
00311         neg = 0xffff;
00312     }
00313     return OPL3_EnvelopeCalcExp(envelope << 3) ^ neg;
00314 }
00315 
00316 static Bit16s OPL3_EnvelopeCalcSin7(Bit16u phase, Bit16u envelope)
00317 {
00318     Bit16u out = 0;
00319     Bit16u neg = 0;
00320     phase &= 0x3ff;
00321     if (phase & 0x200)
00322     {
00323         neg = 0xffff;
00324         phase = (phase & 0x1ff) ^ 0x1ff;
00325     }
00326     out = phase << 3;
00327     return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
00328 }
00329 
00330 static const envelope_sinfunc envelope_sin[8] = {
00331     OPL3_EnvelopeCalcSin0,
00332     OPL3_EnvelopeCalcSin1,
00333     OPL3_EnvelopeCalcSin2,
00334     OPL3_EnvelopeCalcSin3,
00335     OPL3_EnvelopeCalcSin4,
00336     OPL3_EnvelopeCalcSin5,
00337     OPL3_EnvelopeCalcSin6,
00338     OPL3_EnvelopeCalcSin7
00339 };
00340 
00341 enum envelope_gen_num
00342 {
00343     envelope_gen_num_attack = 0,
00344     envelope_gen_num_decay = 1,
00345     envelope_gen_num_sustain = 2,
00346     envelope_gen_num_release = 3
00347 };
00348 
00349 static void OPL3_EnvelopeUpdateKSL(opl3_slot *slot)
00350 {
00351     Bit16s ksl = (kslrom[slot->channel->f_num >> 6] << 2)
00352                - ((0x08 - slot->channel->block) << 5);
00353     if (ksl < 0)
00354     {
00355         ksl = 0;
00356     }
00357     slot->eg_ksl = (Bit8u)ksl;
00358 }
00359 
00360 static void OPL3_EnvelopeCalc(opl3_slot *slot)
00361 {
00362     Bit8u nonzero;
00363     Bit8u rate;
00364     Bit8u rate_hi;
00365     Bit8u rate_lo;
00366     Bit8u reg_rate = 0;
00367     Bit8u ks;
00368     Bit8u eg_shift, shift;
00369     Bit16u eg_rout;
00370     Bit16s eg_inc;
00371     Bit8u eg_off;
00372     Bit8u reset = 0;
00373     slot->eg_out = slot->eg_rout + (slot->reg_tl << 2)
00374                  + (slot->eg_ksl >> kslshift[slot->reg_ksl]) + *slot->trem;
00375     if (slot->key && slot->eg_gen == envelope_gen_num_release)
00376     {
00377         reset = 1;
00378         reg_rate = slot->reg_ar;
00379     }
00380     else
00381     {
00382         switch (slot->eg_gen)
00383         {
00384         case envelope_gen_num_attack:
00385             reg_rate = slot->reg_ar;
00386             break;
00387         case envelope_gen_num_decay:
00388             reg_rate = slot->reg_dr;
00389             break;
00390         case envelope_gen_num_sustain:
00391             if (!slot->reg_type)
00392             {
00393                 reg_rate = slot->reg_rr;
00394             }
00395             break;
00396         case envelope_gen_num_release:
00397             reg_rate = slot->reg_rr;
00398             break;
00399         }
00400     }
00401     slot->pg_reset = reset;
00402     ks = slot->channel->ksv >> ((slot->reg_ksr ^ 1) << 1);
00403     nonzero = (reg_rate != 0);
00404     rate = ks + (reg_rate << 2);
00405     rate_hi = rate >> 2;
00406     rate_lo = rate & 0x03;
00407     if (rate_hi & 0x10)
00408     {
00409         rate_hi = 0x0f;
00410     }
00411     eg_shift = rate_hi + slot->chip->eg_add;
00412     shift = 0;
00413     if (nonzero)
00414     {
00415         if (rate_hi < 12)
00416         {
00417             if (slot->chip->eg_state)
00418             {
00419                 switch (eg_shift)
00420                 {
00421                 case 12:
00422                     shift = 1;
00423                     break;
00424                 case 13:
00425                     shift = (rate_lo >> 1) & 0x01;
00426                     break;
00427                 case 14:
00428                     shift = rate_lo & 0x01;
00429                     break;
00430                 default:
00431                     break;
00432                 }
00433             }
00434         }
00435         else
00436         {
00437             shift = (rate_hi & 0x03) + eg_incstep[rate_lo][slot->chip->timer & 0x03];
00438             if (shift & 0x04)
00439             {
00440                 shift = 0x03;
00441             }
00442             if (!shift)
00443             {
00444                 shift = slot->chip->eg_state;
00445             }
00446         }
00447     }
00448     eg_rout = slot->eg_rout;
00449     eg_inc = 0;
00450     eg_off = 0;
00451     // Instant attack
00452     if (reset && rate_hi == 0x0f)
00453     {
00454         eg_rout = 0x00;
00455     }
00456     // Envelope off
00457     if ((slot->eg_rout & 0x1f8) == 0x1f8)
00458     {
00459         eg_off = 1;
00460     }
00461     if (slot->eg_gen != envelope_gen_num_attack && !reset && eg_off)
00462     {
00463         eg_rout = 0x1ff;
00464     }
00465     switch (slot->eg_gen)
00466     {
00467     case envelope_gen_num_attack:
00468         if (!slot->eg_rout)
00469         {
00470             slot->eg_gen = envelope_gen_num_decay;
00471         }
00472         else if (slot->key && shift > 0 && rate_hi != 0x0f)
00473         {
00474             eg_inc = ((~slot->eg_rout) << shift) >> 4;
00475         }
00476         break;
00477     case envelope_gen_num_decay:
00478         if ((slot->eg_rout >> 4) == slot->reg_sl)
00479         {
00480             slot->eg_gen = envelope_gen_num_sustain;
00481         }
00482         else if (!eg_off && !reset && shift > 0)
00483         {
00484             eg_inc = 1 << (shift - 1);
00485         }
00486         break;
00487     case envelope_gen_num_sustain:
00488     case envelope_gen_num_release:
00489         if (!eg_off && !reset && shift > 0)
00490         {
00491             eg_inc = 1 << (shift - 1);
00492         }
00493         break;
00494     }
00495     slot->eg_rout = (eg_rout + eg_inc) & 0x1ff;
00496     // Key off
00497     if (reset)
00498     {
00499         slot->eg_gen = envelope_gen_num_attack;
00500     }
00501     if (!slot->key)
00502     {
00503         slot->eg_gen = envelope_gen_num_release;
00504     }
00505 }
00506 
00507 static void OPL3_EnvelopeKeyOn(opl3_slot *slot, Bit8u type)
00508 {
00509     slot->key |= type;
00510 }
00511 
00512 static void OPL3_EnvelopeKeyOff(opl3_slot *slot, Bit8u type)
00513 {
00514     slot->key &= ~type;
00515 }
00516 
00517 //
00518 // Phase Generator
00519 //
00520 
00521 static void OPL3_PhaseGenerate(opl3_slot *slot)
00522 {
00523     opl3_chip *chip;
00524     Bit16u f_num;
00525     Bit32u basefreq;
00526     Bit8u rm_xor, n_bit;
00527     Bit32u noise;
00528     Bit16u phase;
00529 
00530     chip = slot->chip;
00531     f_num = slot->channel->f_num;
00532     if (slot->reg_vib)
00533     {
00534         Bit8s range;
00535         Bit8u vibpos;
00536 
00537         range = (f_num >> 7) & 7;
00538         vibpos = slot->chip->vibpos;
00539 
00540         if (!(vibpos & 3))
00541         {
00542             range = 0;
00543         }
00544         else if (vibpos & 1)
00545         {
00546             range >>= 1;
00547         }
00548         range >>= slot->chip->vibshift;
00549 
00550         if (vibpos & 4)
00551         {
00552             range = -range;
00553         }
00554         f_num += range;
00555     }
00556     basefreq = (f_num << slot->channel->block) >> 1;
00557     phase = (Bit16u)(slot->pg_phase >> 9);
00558     if (slot->pg_reset)
00559     {
00560         slot->pg_phase = 0;
00561     }
00562     slot->pg_phase += (basefreq * mt[slot->reg_mult]) >> 1;
00563     // Rhythm mode
00564     noise = chip->noise;
00565     slot->pg_phase_out = phase;
00566     if (slot->slot_num == 13) // hh
00567     {
00568         chip->rm_hh_bit2 = (phase >> 2) & 1;
00569         chip->rm_hh_bit3 = (phase >> 3) & 1;
00570         chip->rm_hh_bit7 = (phase >> 7) & 1;
00571         chip->rm_hh_bit8 = (phase >> 8) & 1;
00572     }
00573     if (slot->slot_num == 17 && (chip->rhy & 0x20)) // tc
00574     {
00575         chip->rm_tc_bit3 = (phase >> 3) & 1;
00576         chip->rm_tc_bit5 = (phase >> 5) & 1;
00577     }
00578     if (chip->rhy & 0x20)
00579     {
00580         rm_xor = (chip->rm_hh_bit2 ^ chip->rm_hh_bit7)
00581                | (chip->rm_hh_bit3 ^ chip->rm_tc_bit5)
00582                | (chip->rm_tc_bit3 ^ chip->rm_tc_bit5);
00583         switch (slot->slot_num)
00584         {
00585         case 13: // hh
00586             slot->pg_phase_out = rm_xor << 9;
00587             if (rm_xor ^ (noise & 1))
00588             {
00589                 slot->pg_phase_out |= 0xd0;
00590             }
00591             else
00592             {
00593                 slot->pg_phase_out |= 0x34;
00594             }
00595             break;
00596         case 16: // sd
00597             slot->pg_phase_out = (chip->rm_hh_bit8 << 9)
00598                                | ((chip->rm_hh_bit8 ^ (noise & 1)) << 8);
00599             break;
00600         case 17: // tc
00601             slot->pg_phase_out = (rm_xor << 9) | 0x80;
00602             break;
00603         default:
00604             break;
00605         }
00606     }
00607     n_bit = ((noise >> 14) ^ noise) & 0x01;
00608     chip->noise = (noise >> 1) | (n_bit << 22);
00609 }
00610 
00611 //
00612 // Slot
00613 //
00614 
00615 static void OPL3_SlotWrite20(opl3_slot *slot, Bit8u data)
00616 {
00617     if ((data >> 7) & 0x01)
00618     {
00619         slot->trem = &slot->chip->tremolo;
00620     }
00621     else
00622     {
00623         slot->trem = (Bit8u*)&slot->chip->zeromod;
00624     }
00625     slot->reg_vib = (data >> 6) & 0x01;
00626     slot->reg_type = (data >> 5) & 0x01;
00627     slot->reg_ksr = (data >> 4) & 0x01;
00628     slot->reg_mult = data & 0x0f;
00629 }
00630 
00631 static void OPL3_SlotWrite40(opl3_slot *slot, Bit8u data)
00632 {
00633     slot->reg_ksl = (data >> 6) & 0x03;
00634     slot->reg_tl = data & 0x3f;
00635     OPL3_EnvelopeUpdateKSL(slot);
00636 }
00637 
00638 static void OPL3_SlotWrite60(opl3_slot *slot, Bit8u data)
00639 {
00640     slot->reg_ar = (data >> 4) & 0x0f;
00641     slot->reg_dr = data & 0x0f;
00642 }
00643 
00644 static void OPL3_SlotWrite80(opl3_slot *slot, Bit8u data)
00645 {
00646     slot->reg_sl = (data >> 4) & 0x0f;
00647     if (slot->reg_sl == 0x0f)
00648     {
00649         slot->reg_sl = 0x1f;
00650     }
00651     slot->reg_rr = data & 0x0f;
00652 }
00653 
00654 static void OPL3_SlotWriteE0(opl3_slot *slot, Bit8u data)
00655 {
00656     slot->reg_wf = data & 0x07;
00657     if (slot->chip->newm == 0x00)
00658     {
00659         slot->reg_wf &= 0x03;
00660     }
00661 }
00662 
00663 static void OPL3_SlotGenerate(opl3_slot *slot)
00664 {
00665     slot->out = envelope_sin[slot->reg_wf](slot->pg_phase_out + *slot->mod, slot->eg_out);
00666 }
00667 
00668 static void OPL3_SlotCalcFB(opl3_slot *slot)
00669 {
00670     if (slot->channel->fb != 0x00)
00671     {
00672         slot->fbmod = (slot->prout + slot->out) >> (0x09 - slot->channel->fb);
00673     }
00674     else
00675     {
00676         slot->fbmod = 0;
00677     }
00678     slot->prout = slot->out;
00679 }
00680 
00681 //
00682 // Channel
00683 //
00684 
00685 static void OPL3_ChannelSetupAlg(opl3_channel *channel);
00686 
00687 static void OPL3_ChannelUpdateRhythm(opl3_chip *chip, Bit8u data)
00688 {
00689     opl3_channel *channel6;
00690     opl3_channel *channel7;
00691     opl3_channel *channel8;
00692     Bit8u chnum;
00693 
00694     chip->rhy = data & 0x3f;
00695     if (chip->rhy & 0x20)
00696     {
00697         channel6 = &chip->channel[6];
00698         channel7 = &chip->channel[7];
00699         channel8 = &chip->channel[8];
00700         channel6->out[0] = &channel6->slots[1]->out;
00701         channel6->out[1] = &channel6->slots[1]->out;
00702         channel6->out[2] = &chip->zeromod;
00703         channel6->out[3] = &chip->zeromod;
00704         channel7->out[0] = &channel7->slots[0]->out;
00705         channel7->out[1] = &channel7->slots[0]->out;
00706         channel7->out[2] = &channel7->slots[1]->out;
00707         channel7->out[3] = &channel7->slots[1]->out;
00708         channel8->out[0] = &channel8->slots[0]->out;
00709         channel8->out[1] = &channel8->slots[0]->out;
00710         channel8->out[2] = &channel8->slots[1]->out;
00711         channel8->out[3] = &channel8->slots[1]->out;
00712         for (chnum = 6; chnum < 9; chnum++)
00713         {
00714             chip->channel[chnum].chtype = ch_drum;
00715         }
00716         OPL3_ChannelSetupAlg(channel6);
00717         OPL3_ChannelSetupAlg(channel7);
00718         OPL3_ChannelSetupAlg(channel8);
00719         //hh
00720         if (chip->rhy & 0x01)
00721         {
00722             OPL3_EnvelopeKeyOn(channel7->slots[0], egk_drum);
00723         }
00724         else
00725         {
00726             OPL3_EnvelopeKeyOff(channel7->slots[0], egk_drum);
00727         }
00728         //tc
00729         if (chip->rhy & 0x02)
00730         {
00731             OPL3_EnvelopeKeyOn(channel8->slots[1], egk_drum);
00732         }
00733         else
00734         {
00735             OPL3_EnvelopeKeyOff(channel8->slots[1], egk_drum);
00736         }
00737         //tom
00738         if (chip->rhy & 0x04)
00739         {
00740             OPL3_EnvelopeKeyOn(channel8->slots[0], egk_drum);
00741         }
00742         else
00743         {
00744             OPL3_EnvelopeKeyOff(channel8->slots[0], egk_drum);
00745         }
00746         //sd
00747         if (chip->rhy & 0x08)
00748         {
00749             OPL3_EnvelopeKeyOn(channel7->slots[1], egk_drum);
00750         }
00751         else
00752         {
00753             OPL3_EnvelopeKeyOff(channel7->slots[1], egk_drum);
00754         }
00755         //bd
00756         if (chip->rhy & 0x10)
00757         {
00758             OPL3_EnvelopeKeyOn(channel6->slots[0], egk_drum);
00759             OPL3_EnvelopeKeyOn(channel6->slots[1], egk_drum);
00760         }
00761         else
00762         {
00763             OPL3_EnvelopeKeyOff(channel6->slots[0], egk_drum);
00764             OPL3_EnvelopeKeyOff(channel6->slots[1], egk_drum);
00765         }
00766     }
00767     else
00768     {
00769         for (chnum = 6; chnum < 9; chnum++)
00770         {
00771             chip->channel[chnum].chtype = ch_2op;
00772             OPL3_ChannelSetupAlg(&chip->channel[chnum]);
00773             OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[0], egk_drum);
00774             OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[1], egk_drum);
00775         }
00776     }
00777 }
00778 
00779 static void OPL3_ChannelWriteA0(opl3_channel *channel, Bit8u data)
00780 {
00781     if (channel->chip->newm && channel->chtype == ch_4op2)
00782     {
00783         return;
00784     }
00785     channel->f_num = (channel->f_num & 0x300) | data;
00786     channel->ksv = (channel->block << 1)
00787                  | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
00788     OPL3_EnvelopeUpdateKSL(channel->slots[0]);
00789     OPL3_EnvelopeUpdateKSL(channel->slots[1]);
00790     if (channel->chip->newm && channel->chtype == ch_4op)
00791     {
00792         channel->pair->f_num = channel->f_num;
00793         channel->pair->ksv = channel->ksv;
00794         OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]);
00795         OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]);
00796     }
00797 }
00798 
00799 static void OPL3_ChannelWriteB0(opl3_channel *channel, Bit8u data)
00800 {
00801     if (channel->chip->newm && channel->chtype == ch_4op2)
00802     {
00803         return;
00804     }
00805     channel->f_num = (channel->f_num & 0xff) | ((data & 0x03) << 8);
00806     channel->block = (data >> 2) & 0x07;
00807     channel->ksv = (channel->block << 1)
00808                  | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
00809     OPL3_EnvelopeUpdateKSL(channel->slots[0]);
00810     OPL3_EnvelopeUpdateKSL(channel->slots[1]);
00811     if (channel->chip->newm && channel->chtype == ch_4op)
00812     {
00813         channel->pair->f_num = channel->f_num;
00814         channel->pair->block = channel->block;
00815         channel->pair->ksv = channel->ksv;
00816         OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]);
00817         OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]);
00818     }
00819 }
00820 
00821 static void OPL3_ChannelSetupAlg(opl3_channel *channel)
00822 {
00823     if (channel->chtype == ch_drum)
00824     {
00825         if (channel->ch_num == 7 || channel->ch_num == 8)
00826         {
00827             channel->slots[0]->mod = &channel->chip->zeromod;
00828             channel->slots[1]->mod = &channel->chip->zeromod;
00829             return;
00830         }
00831         switch (channel->alg & 0x01)
00832         {
00833         case 0x00:
00834             channel->slots[0]->mod = &channel->slots[0]->fbmod;
00835             channel->slots[1]->mod = &channel->slots[0]->out;
00836             break;
00837         case 0x01:
00838             channel->slots[0]->mod = &channel->slots[0]->fbmod;
00839             channel->slots[1]->mod = &channel->chip->zeromod;
00840             break;
00841         }
00842         return;
00843     }
00844     if (channel->alg & 0x08)
00845     {
00846         return;
00847     }
00848     if (channel->alg & 0x04)
00849     {
00850         channel->pair->out[0] = &channel->chip->zeromod;
00851         channel->pair->out[1] = &channel->chip->zeromod;
00852         channel->pair->out[2] = &channel->chip->zeromod;
00853         channel->pair->out[3] = &channel->chip->zeromod;
00854         switch (channel->alg & 0x03)
00855         {
00856         case 0x00:
00857             channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
00858             channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
00859             channel->slots[0]->mod = &channel->pair->slots[1]->out;
00860             channel->slots[1]->mod = &channel->slots[0]->out;
00861             channel->out[0] = &channel->slots[1]->out;
00862             channel->out[1] = &channel->chip->zeromod;
00863             channel->out[2] = &channel->chip->zeromod;
00864             channel->out[3] = &channel->chip->zeromod;
00865             break;
00866         case 0x01:
00867             channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
00868             channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
00869             channel->slots[0]->mod = &channel->chip->zeromod;
00870             channel->slots[1]->mod = &channel->slots[0]->out;
00871             channel->out[0] = &channel->pair->slots[1]->out;
00872             channel->out[1] = &channel->slots[1]->out;
00873             channel->out[2] = &channel->chip->zeromod;
00874             channel->out[3] = &channel->chip->zeromod;
00875             break;
00876         case 0x02:
00877             channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
00878             channel->pair->slots[1]->mod = &channel->chip->zeromod;
00879             channel->slots[0]->mod = &channel->pair->slots[1]->out;
00880             channel->slots[1]->mod = &channel->slots[0]->out;
00881             channel->out[0] = &channel->pair->slots[0]->out;
00882             channel->out[1] = &channel->slots[1]->out;
00883             channel->out[2] = &channel->chip->zeromod;
00884             channel->out[3] = &channel->chip->zeromod;
00885             break;
00886         case 0x03:
00887             channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
00888             channel->pair->slots[1]->mod = &channel->chip->zeromod;
00889             channel->slots[0]->mod = &channel->pair->slots[1]->out;
00890             channel->slots[1]->mod = &channel->chip->zeromod;
00891             channel->out[0] = &channel->pair->slots[0]->out;
00892             channel->out[1] = &channel->slots[0]->out;
00893             channel->out[2] = &channel->slots[1]->out;
00894             channel->out[3] = &channel->chip->zeromod;
00895             break;
00896         }
00897     }
00898     else
00899     {
00900         switch (channel->alg & 0x01)
00901         {
00902         case 0x00:
00903             channel->slots[0]->mod = &channel->slots[0]->fbmod;
00904             channel->slots[1]->mod = &channel->slots[0]->out;
00905             channel->out[0] = &channel->slots[1]->out;
00906             channel->out[1] = &channel->chip->zeromod;
00907             channel->out[2] = &channel->chip->zeromod;
00908             channel->out[3] = &channel->chip->zeromod;
00909             break;
00910         case 0x01:
00911             channel->slots[0]->mod = &channel->slots[0]->fbmod;
00912             channel->slots[1]->mod = &channel->chip->zeromod;
00913             channel->out[0] = &channel->slots[0]->out;
00914             channel->out[1] = &channel->slots[1]->out;
00915             channel->out[2] = &channel->chip->zeromod;
00916             channel->out[3] = &channel->chip->zeromod;
00917             break;
00918         }
00919     }
00920 }
00921 
00922 static void OPL3_ChannelWriteC0(opl3_channel *channel, Bit8u data)
00923 {
00924     channel->fb = (data & 0x0e) >> 1;
00925     channel->con = data & 0x01;
00926     channel->alg = channel->con;
00927     if (channel->chip->newm)
00928     {
00929         if (channel->chtype == ch_4op)
00930         {
00931             channel->pair->alg = 0x04 | (channel->con << 1) | (channel->pair->con);
00932             channel->alg = 0x08;
00933             OPL3_ChannelSetupAlg(channel->pair);
00934         }
00935         else if (channel->chtype == ch_4op2)
00936         {
00937             channel->alg = 0x04 | (channel->pair->con << 1) | (channel->con);
00938             channel->pair->alg = 0x08;
00939             OPL3_ChannelSetupAlg(channel);
00940         }
00941         else
00942         {
00943             OPL3_ChannelSetupAlg(channel);
00944         }
00945     }
00946     else
00947     {
00948         OPL3_ChannelSetupAlg(channel);
00949     }
00950     if (channel->chip->newm)
00951     {
00952         channel->cha = ((data >> 4) & 0x01) ? ~0 : 0;
00953         channel->chb = ((data >> 5) & 0x01) ? ~0 : 0;
00954     }
00955     else
00956     {
00957         channel->cha = channel->chb = (Bit16u)~0;
00958     }
00959 }
00960 
00961 static void OPL3_ChannelKeyOn(opl3_channel *channel)
00962 {
00963     if (channel->chip->newm)
00964     {
00965         if (channel->chtype == ch_4op)
00966         {
00967             OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
00968             OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
00969             OPL3_EnvelopeKeyOn(channel->pair->slots[0], egk_norm);
00970             OPL3_EnvelopeKeyOn(channel->pair->slots[1], egk_norm);
00971         }
00972         else if (channel->chtype == ch_2op || channel->chtype == ch_drum)
00973         {
00974             OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
00975             OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
00976         }
00977     }
00978     else
00979     {
00980         OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
00981         OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
00982     }
00983 }
00984 
00985 static void OPL3_ChannelKeyOff(opl3_channel *channel)
00986 {
00987     if (channel->chip->newm)
00988     {
00989         if (channel->chtype == ch_4op)
00990         {
00991             OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
00992             OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
00993             OPL3_EnvelopeKeyOff(channel->pair->slots[0], egk_norm);
00994             OPL3_EnvelopeKeyOff(channel->pair->slots[1], egk_norm);
00995         }
00996         else if (channel->chtype == ch_2op || channel->chtype == ch_drum)
00997         {
00998             OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
00999             OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
01000         }
01001     }
01002     else
01003     {
01004         OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
01005         OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
01006     }
01007 }
01008 
01009 static void OPL3_ChannelSet4Op(opl3_chip *chip, Bit8u data)
01010 {
01011     Bit8u bit;
01012     Bit8u chnum;
01013     for (bit = 0; bit < 6; bit++)
01014     {
01015         chnum = bit;
01016         if (bit >= 3)
01017         {
01018             chnum += 9 - 3;
01019         }
01020         if ((data >> bit) & 0x01)
01021         {
01022             chip->channel[chnum].chtype = ch_4op;
01023             chip->channel[chnum + 3].chtype = ch_4op2;
01024         }
01025         else
01026         {
01027             chip->channel[chnum].chtype = ch_2op;
01028             chip->channel[chnum + 3].chtype = ch_2op;
01029         }
01030     }
01031 }
01032 
01033 static Bit16s OPL3_ClipSample(Bit32s sample)
01034 {
01035     if (sample > 32767)
01036     {
01037         sample = 32767;
01038     }
01039     else if (sample < -32768)
01040     {
01041         sample = -32768;
01042     }
01043     return (Bit16s)sample;
01044 }
01045 
01046 void OPL3_Generate(opl3_chip *chip, Bit16s *buf)
01047 {
01048     Bit8u ii;
01049     Bit8u jj;
01050     Bit16s accm;
01051     Bit8u shift = 0;
01052 
01053     buf[1] = OPL3_ClipSample(chip->mixbuff[1]);
01054 
01055     for (ii = 0; ii < 15; ii++)
01056     {
01057         OPL3_SlotCalcFB(&chip->slot[ii]);
01058         OPL3_EnvelopeCalc(&chip->slot[ii]);
01059         OPL3_PhaseGenerate(&chip->slot[ii]);
01060         OPL3_SlotGenerate(&chip->slot[ii]);
01061     }
01062 
01063     chip->mixbuff[0] = 0;
01064     for (ii = 0; ii < 18; ii++)
01065     {
01066         accm = 0;
01067         for (jj = 0; jj < 4; jj++)
01068         {
01069             accm += *chip->channel[ii].out[jj];
01070         }
01071         chip->mixbuff[0] += (Bit16s)(accm & chip->channel[ii].cha);
01072     }
01073 
01074     for (ii = 15; ii < 18; ii++)
01075     {
01076         OPL3_SlotCalcFB(&chip->slot[ii]);
01077         OPL3_EnvelopeCalc(&chip->slot[ii]);
01078         OPL3_PhaseGenerate(&chip->slot[ii]);
01079         OPL3_SlotGenerate(&chip->slot[ii]);
01080     }
01081 
01082     buf[0] = OPL3_ClipSample(chip->mixbuff[0]);
01083 
01084     for (ii = 18; ii < 33; ii++)
01085     {
01086         OPL3_SlotCalcFB(&chip->slot[ii]);
01087         OPL3_EnvelopeCalc(&chip->slot[ii]);
01088         OPL3_PhaseGenerate(&chip->slot[ii]);
01089         OPL3_SlotGenerate(&chip->slot[ii]);
01090     }
01091 
01092     chip->mixbuff[1] = 0;
01093     for (ii = 0; ii < 18; ii++)
01094     {
01095         accm = 0;
01096         for (jj = 0; jj < 4; jj++)
01097         {
01098             accm += *chip->channel[ii].out[jj];
01099         }
01100         chip->mixbuff[1] += (Bit16s)(accm & chip->channel[ii].chb);
01101     }
01102 
01103     for (ii = 33; ii < 36; ii++)
01104     {
01105         OPL3_SlotCalcFB(&chip->slot[ii]);
01106         OPL3_EnvelopeCalc(&chip->slot[ii]);
01107         OPL3_PhaseGenerate(&chip->slot[ii]);
01108         OPL3_SlotGenerate(&chip->slot[ii]);
01109     }
01110 
01111     if ((chip->timer & 0x3f) == 0x3f)
01112     {
01113         chip->tremolopos = (chip->tremolopos + 1) % 210;
01114     }
01115     if (chip->tremolopos < 105)
01116     {
01117         chip->tremolo = chip->tremolopos >> chip->tremoloshift;
01118     }
01119     else
01120     {
01121         chip->tremolo = (210 - chip->tremolopos) >> chip->tremoloshift;
01122     }
01123 
01124     if ((chip->timer & 0x3ff) == 0x3ff)
01125     {
01126         chip->vibpos = (chip->vibpos + 1) & 7;
01127     }
01128 
01129     chip->timer++;
01130 
01131     chip->eg_add = 0;
01132     if (chip->eg_timer)
01133     {
01134         while (shift < 36 && ((chip->eg_timer >> shift) & 1) == 0)
01135         {
01136             shift++;
01137         }
01138         if (shift > 12)
01139         {
01140             chip->eg_add = 0;
01141         }
01142         else
01143         {
01144             chip->eg_add = shift + 1;
01145         }
01146     }
01147 
01148     if (chip->eg_timerrem || chip->eg_state)
01149     {
01150         if (chip->eg_timer == 0xfffffffff)
01151         {
01152             chip->eg_timer = 0;
01153             chip->eg_timerrem = 1;
01154         }
01155         else
01156         {
01157             chip->eg_timer++;
01158             chip->eg_timerrem = 0;
01159         }
01160     }
01161 
01162     chip->eg_state ^= 1;
01163 
01164     while (chip->writebuf[chip->writebuf_cur].time <= chip->writebuf_samplecnt)
01165     {
01166         if (!(chip->writebuf[chip->writebuf_cur].reg & 0x200))
01167         {
01168             break;
01169         }
01170         chip->writebuf[chip->writebuf_cur].reg &= 0x1ff;
01171         OPL3_WriteReg(chip, chip->writebuf[chip->writebuf_cur].reg,
01172                       chip->writebuf[chip->writebuf_cur].data);
01173         chip->writebuf_cur = (chip->writebuf_cur + 1) % OPL_WRITEBUF_SIZE;
01174     }
01175     chip->writebuf_samplecnt++;
01176 }
01177 
01178 void OPL3_GenerateResampled(opl3_chip *chip, Bit16s *buf)
01179 {
01180     while (chip->samplecnt >= chip->rateratio)
01181     {
01182         chip->oldsamples[0] = chip->samples[0];
01183         chip->oldsamples[1] = chip->samples[1];
01184         OPL3_Generate(chip, chip->samples);
01185         chip->samplecnt -= chip->rateratio;
01186     }
01187     buf[0] = (Bit16s)((chip->oldsamples[0] * (chip->rateratio - chip->samplecnt)
01188                      + chip->samples[0] * chip->samplecnt) / chip->rateratio);
01189     buf[1] = (Bit16s)((chip->oldsamples[1] * (chip->rateratio - chip->samplecnt)
01190                      + chip->samples[1] * chip->samplecnt) / chip->rateratio);
01191     chip->samplecnt += 1 << RSM_FRAC;
01192 }
01193 
01194 void OPL3_Reset(opl3_chip *chip, Bit32u samplerate)
01195 {
01196     Bit8u slotnum;
01197     Bit8u channum;
01198 
01199     memset(chip, 0, sizeof(opl3_chip));
01200     for (slotnum = 0; slotnum < 36; slotnum++)
01201     {
01202         chip->slot[slotnum].chip = chip;
01203         chip->slot[slotnum].mod = &chip->zeromod;
01204         chip->slot[slotnum].eg_rout = 0x1ff;
01205         chip->slot[slotnum].eg_out = 0x1ff;
01206         chip->slot[slotnum].eg_gen = envelope_gen_num_release;
01207         chip->slot[slotnum].trem = (Bit8u*)&chip->zeromod;
01208         chip->slot[slotnum].slot_num = slotnum;
01209     }
01210     for (channum = 0; channum < 18; channum++)
01211     {
01212         chip->channel[channum].slots[0] = &chip->slot[ch_slot[channum]];
01213         chip->channel[channum].slots[1] = &chip->slot[ch_slot[channum] + 3];
01214         chip->slot[ch_slot[channum]].channel = &chip->channel[channum];
01215         chip->slot[ch_slot[channum] + 3].channel = &chip->channel[channum];
01216         if ((channum % 9) < 3)
01217         {
01218             chip->channel[channum].pair = &chip->channel[channum + 3];
01219         }
01220         else if ((channum % 9) < 6)
01221         {
01222             chip->channel[channum].pair = &chip->channel[channum - 3];
01223         }
01224         chip->channel[channum].chip = chip;
01225         chip->channel[channum].out[0] = &chip->zeromod;
01226         chip->channel[channum].out[1] = &chip->zeromod;
01227         chip->channel[channum].out[2] = &chip->zeromod;
01228         chip->channel[channum].out[3] = &chip->zeromod;
01229         chip->channel[channum].chtype = ch_2op;
01230         chip->channel[channum].cha = 0xffff;
01231         chip->channel[channum].chb = 0xffff;
01232         chip->channel[channum].ch_num = channum;
01233         OPL3_ChannelSetupAlg(&chip->channel[channum]);
01234     }
01235     chip->noise = 1;
01236     chip->rateratio = (samplerate << RSM_FRAC) / 49716;
01237     chip->tremoloshift = 4;
01238     chip->vibshift = 1;
01239 }
01240 
01241 void OPL3_WriteReg(opl3_chip *chip, Bit16u reg, Bit8u v)
01242 {
01243     Bit8u high = (reg >> 8) & 0x01;
01244     Bit8u regm = reg & 0xff;
01245     switch (regm & 0xf0)
01246     {
01247     case 0x00:
01248         if (high)
01249         {
01250             switch (regm & 0x0f)
01251             {
01252             case 0x04:
01253                 OPL3_ChannelSet4Op(chip, v);
01254                 break;
01255             case 0x05:
01256                 chip->newm = v & 0x01;
01257                 break;
01258             }
01259         }
01260         else
01261         {
01262             switch (regm & 0x0f)
01263             {
01264             case 0x08:
01265                 chip->nts = (v >> 6) & 0x01;
01266                 break;
01267             }
01268         }
01269         break;
01270     case 0x20:
01271     case 0x30:
01272         if (ad_slot[regm & 0x1f] >= 0)
01273         {
01274             OPL3_SlotWrite20(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
01275         }
01276         break;
01277     case 0x40:
01278     case 0x50:
01279         if (ad_slot[regm & 0x1f] >= 0)
01280         {
01281             OPL3_SlotWrite40(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
01282         }
01283         break;
01284     case 0x60:
01285     case 0x70:
01286         if (ad_slot[regm & 0x1f] >= 0)
01287         {
01288             OPL3_SlotWrite60(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
01289         }
01290         break;
01291     case 0x80:
01292     case 0x90:
01293         if (ad_slot[regm & 0x1f] >= 0)
01294         {
01295             OPL3_SlotWrite80(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
01296         }
01297         break;
01298     case 0xe0:
01299     case 0xf0:
01300         if (ad_slot[regm & 0x1f] >= 0)
01301         {
01302             OPL3_SlotWriteE0(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
01303         }
01304         break;
01305     case 0xa0:
01306         if ((regm & 0x0f) < 9)
01307         {
01308             OPL3_ChannelWriteA0(&chip->channel[9 * high + (regm & 0x0f)], v);
01309         }
01310         break;
01311     case 0xb0:
01312         if (regm == 0xbd && !high)
01313         {
01314             chip->tremoloshift = (((v >> 7) ^ 1) << 1) + 2;
01315             chip->vibshift = ((v >> 6) & 0x01) ^ 1;
01316             OPL3_ChannelUpdateRhythm(chip, v);
01317         }
01318         else if ((regm & 0x0f) < 9)
01319         {
01320             OPL3_ChannelWriteB0(&chip->channel[9 * high + (regm & 0x0f)], v);
01321             if (v & 0x20)
01322             {
01323                 OPL3_ChannelKeyOn(&chip->channel[9 * high + (regm & 0x0f)]);
01324             }
01325             else
01326             {
01327                 OPL3_ChannelKeyOff(&chip->channel[9 * high + (regm & 0x0f)]);
01328             }
01329         }
01330         break;
01331     case 0xc0:
01332         if ((regm & 0x0f) < 9)
01333         {
01334             OPL3_ChannelWriteC0(&chip->channel[9 * high + (regm & 0x0f)], v);
01335         }
01336         break;
01337     }
01338 }
01339 
01340 void OPL3_WriteRegBuffered(opl3_chip *chip, Bit16u reg, Bit8u v)
01341 {
01342     Bit64u time1, time2;
01343 
01344     if (chip->writebuf[chip->writebuf_last].reg & 0x200)
01345     {
01346         OPL3_WriteReg(chip, chip->writebuf[chip->writebuf_last].reg & 0x1ff,
01347                       chip->writebuf[chip->writebuf_last].data);
01348 
01349         chip->writebuf_cur = (chip->writebuf_last + 1) % OPL_WRITEBUF_SIZE;
01350         chip->writebuf_samplecnt = chip->writebuf[chip->writebuf_last].time;
01351     }
01352 
01353     chip->writebuf[chip->writebuf_last].reg = reg | 0x200;
01354     chip->writebuf[chip->writebuf_last].data = v;
01355     time1 = chip->writebuf_lasttime + OPL_WRITEBUF_DELAY;
01356     time2 = chip->writebuf_samplecnt;
01357 
01358     if (time1 < time2)
01359     {
01360         time1 = time2;
01361     }
01362 
01363     chip->writebuf[chip->writebuf_last].time = time1;
01364     chip->writebuf_lasttime = time1;
01365     chip->writebuf_last = (chip->writebuf_last + 1) % OPL_WRITEBUF_SIZE;
01366 }
01367 
01368 void OPL3_GenerateStream(opl3_chip *chip, Bit16s *sndptr, Bit32u numsamples)
01369 {
01370     Bit32u i;
01371 
01372     for(i = 0; i < numsamples; i++)
01373     {
01374         OPL3_GenerateResampled(chip, sndptr);
01375         sndptr += 2;
01376     }
01377 }